LM1229VEC National Semiconductor, LM1229VEC Datasheet - Page 19

• Manufacturer Part Number: LM1229VEC
• Description: I2C Compatible CMOS TV RGB and Deflection Processor
• Manufacturer: National Semiconductor

Microcontroller Interface
I
The microcontroller interfaces to the LM1229 preamp using
the I
Pulse followed by a byte comprising of a seven bit Slave
Device Address and a Read/Write bit. Since the first byte is
composed of both the address and the read/write bit, the
address of the LM1229 for writing is 0xBA (10111010b) and
the address for reading is 0xBB (10111011b). The develop-
ment software provided by National Semiconductor will au-
tomatically take care of the difference between the read and
write addresses if the target address under the communica-
tions tab is set to 0xBA. Figures 9, 10 show a write and read
sequence on the I
WRITE SEQUENCE
The write sequence begins with a start condition which
consists of the master pulling SDA low while SCL is held
high. The Slave Device Write Address, 0xBA, is sent next.
Each byte that is sent is followed by an acknowledge. When
SCL is high the master will release the SDA line. The slave
must pull SDA low to acknowledge. The register to be written
to is the next byte sent. The master can then send the data,
APPLICATION CONTROL REGISTERS
Tables 5, 6 show the LM1229 RGB and deflection applica-
tion control registers. Care should be taken to avoid writing
2
C COMMUNICATION
2
C compatible interface. The protocol begins with a Start
2
C compatible interface.
FIGURE 10. I
FIGURE 9. I
2
2
C Compatible Write Sequence
C Compatible Read Sequence
19
which consists of one or more bytes. Each data byte is
followed by an acknowledge bit. If more than one data byte
is sent the data will increment to the next address location.
See Figure 9.
READ SEQUENCE
Read sequences are comprised of two I
fer sequences: The first is a write sequence that only trans-
fers the two byte address to be accessed. The second is a
read sequence that starts at the address transferred in the
previous address only write access and increments to the
next address upon every data byte read. This is shown in
Figure 10. The write sequence consists of the Start Pulse,
the Slave Device Write Address (0xBA), and the Acknowl-
edge bit; the next byte is the address to be accessed,
followed by its Acknowledge bit. Then a Stop bit indicates the
end of the address only write access. Next the read data
access will be performed beginning with the Start Pulse, the
Slave Device Read Address (0xBB), and the Acknowledge
bit. The next 8 bits will be the actual data sent by the LM1229
preamp as clocked out by the Master. Subsequent bytes that
are read will correspond to the next incremented address
locations.
or reading any register outside this range as National Semi-
2
C compatible trans-
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