LM1247 National Semiconductor, LM1247 Datasheet - Page 36

• Manufacturer Part Number: LM1247
• Description: 150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs
• Manufacturer: National Semiconductor

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Control Register Definitions
Display Window 2 Horizontal Start Position:
Display Window 2 Vertical Start Position:
Display Window 2 Start Address:
Display Window 2 Column Width:
ROM Bank Select Register A:
Bits 7–0
Bits 7–0
Bits 8–0
Bits 15–9
Bits 31–0
X
Bits 2–0
Bit 3
X
This register determines the horizontal start position of Window 2 in OSD pixels (not video signal pixels). The
actual position, to the right of the horizontal flyback pulse, is determined by multiplying this register value by 4
and adding 30. Due to pipeline delays, the first usable start location is approximately 42 OSD pixels following
the horizontal flyback time. For this reason, we recommend this register be programmed with a number larger
than 2, otherwise improper operation may result.
This register determines the Vertical start position of Window 2 in constant-height character lines (not video
scan lines). The actual position is determined by multiplying this register value by 2. (Note: each character line
is treated as a single auto-height character pixel line, so multiple scan lines may actually be displayed in order
to maintain accurate position relative to the OSD character cell size. (See the Constant Character Height
Mechanism section.) This register should be set so the entire OSD window is within the active video.
This register determines the starting address of Display Window 2 in the Display Page RAM. The power-on
default of 0x100 starts Window 2 at the midpoint of the Page RAM (0x8100). This location always contains the
SL code for the first line of Window 2.
These bits are reserved and should be set to zero.
These are the Display Window 2 Column Width 2x Enable Bits. These thirty-two bits correspond to columns
31–0 of Display Window 2, respectively. A value of zero indicates the column will have normal width (12 OSD
pixels). A value of one indicates the column will be twice as wide as normal (24 OSD pixels). For the double
wide case, each Character Font pixel location will be displayed twice, in two consecutive horizontal pixel
locations. The user should note that if more than 32 display characters are programmed to reside on a row,
then all display characters after the first thirty-two will have normal width (12 pixels).
COLWIDTH2B1 (0x841D)
COLWIDTH2B3 (0x841F)
W2STRTADRH (0x841B)
This three bit field determines the ROM bank (0-7) selected when the upper two bits of the
character address in Page RAM are 00 (Character Address = 00xxxxxxb)
This bit is reserved and should be set to 0.
X
Reserved
Res’d
X
X
X
Bank Select 1
Window 2 Column Width - High Bytes
Window 2 Column Width - Low Bytes
X
B1AD[2:0]
Window 2 Horizontal Start Position
Window 2 Vertical Start Position
(Continued)
BANKSEL_0-1 (0x8427)
X
HSTRT2 (0x8418)
VSTRT2 (0x8419)
COL[31:16]
COL[15:0]
2H[7:0]
2V[7:0]
36
Res’d
X
Window 2 Start Address
Bank Select 0
COLWIDTH2B0 (0x841C)
COLWIDTH2B2 (0x841E)
W2STRTADRL (0x841A)
B1AD[2:0]
2AD[8:0]