PDSP16350 Mitel Networks Corporation, PDSP16350 Datasheet - Page 8

• Manufacturer Part Number: PDSP16350
• Description: I/Q Splitter/NCO
• Manufacturer: Mitel Networks Corporation

PDSP16350
Modulated Frequency
Fig 8. Since the phase increment value can be loaded as a
complete word every cycle, there is no need to provide internal
double buffering to prevent spurious frequencies being gener-
ated during the load operation. Binary Frequency Shift Keyed
(BFSK) modulation can easily be implemented by externally
multiplexing between two phase increment values represent-
ing the two frequencies to be used. The value to be used can
be instantaneously changed, thus maintaining phase coher-
ence, whilst the bit to be transmitted changes from a mark to
a space. Frequency hopping could also be simply effected by
clocking a new random number into the DIN port once every
thousand cycles, for instance. The output will reflect any
change in the frequency after 31 system clock cycles.
each clock cycle, then the output frequency will change
without introducing any dis-
continuities. Thus, a linear
frequency sweep can be
achieved by incrementing the
value on the DIN port by a
fixed amount each cycle. Al-
ternatively, a logarithmic
sweep could be implemented
by ‘walking’ a one across the
DIN port. Shifting the input
one place to the left every
hundred cycles, for example,
would double the frequency
every time.
CW Radar systems is a typi-
cal example of the need for
linear frequency sweeps. This
application requires the gen-
eration of quadrature chirp
waveforms and is illustrated
in simplified form by Fig. 7.
One waveform is needed for
8
The output frequency can be modulated very simply, see
If the phase increment value on the DIN port is changed on
Chirp generation for FM -
CLK
MODE
RESET
JUMP
DATA IN
RESULT
Device Reset
1
Apply First Data
2
A
3
B
D17:0
GENERATOR
SWEEP
Fig. 8 Frequency Modulation Timing Diagram
4
C
Generator
Sin / Cos
Cordic
16 bit
5
D
D33:18
Compensate
ROM
Gain
Fig. 7 Quadrature Chirp Generator
the transmitter, and the other for the receiver. The phase
increment value is supplied by the counter block which simply
increments at a rate determined by dividing down the time
base clock. The synthesised frequency thus increases during
the sweep period.
used to supply the addresses to a PROM. The output of this
PROM is used to amplitude modulate the sine and cosine
waveforms. In this manner it is possible to compensate, at the
source, for any poor frequency versus gain characteristics of
analog circuits further along in the system.
in the analog world, it is necessary to remove the alias
frequencies with low pass filters. The phase linearity and pass
band ripple characteristics of these filters are very important,
if the correct phase relationships are to be maintained be-
tween the two waveforms.
PDSP
16350
A number of the more significant phase increment bits are
The digital outputs directly drive two D/A converters. Once
30
31
First Result Available
32
D/A
D/A
A
33
B
34
C
35
D
COS
SIN