83C152JD Intel Corporation, 83C152JD Datasheet - Page 6

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83C152JD

Manufacturer Part Number
83C152JD
Description
UNIVERSAL COMMUNICATION CONTROLLER 8-BIT MICROCONTROLLER
Manufacturer
Intel Corporation
Datasheet
8XC152JA JB JC JD
6
47-40
9
38
37
39
23
22
N A
N A
N A
N A
Pin
65-58
13
55
54
56
32
31
17 20
21 22
38 39
40 49
67 66
52 57
50 68
1 51
12
53
Port 4 Port 4 is an 8-bit bidirectional I O port with internal pullups Port 4 pins that
have 1s written to them are pulled high by the internal pullups and in that state can
be used as inputs As inputs Port 4 pins that are externally being pulled low will
source current (I
Port 4 also receives the low-order address bytes during program verification
RST Reset input A logic low on this pin for three machine cycles while the
oscillator is running resets the device An internal pullup resistor permits a power-on
reset to be generated using only an external capacitor to V
recognizes the reset after three machine cycles data may continue to be
transmitted for up to 4 machine cycles after Reset is first applied
ALE Address Latch Enable output signal for latching the low byte of the address
during accesses to external memory
frequency and may be used for external timing or clocking purposes Note
however that one ALE pulse is skipped during each access to external Data
Memory While in Reset ALE remains at a constant high level
PSEN Program Store Enable is the Read strobe to External Program Memory
When the 8XC152 is executing from external program memory PSEN is active
(low) When the device is executing code from External Program Memory PSEN is
activated twice each machine cycle except that two PSEN activations are skipped
during each access to External Data Memory While in Reset PSEN remains at a
constant high level
EA External Access enable EA must be externally pulled low in order to enable
the 8XC152 to fetch code from External Program Memory locations 0000H to
0FFFH
XTAL1 Input to the inverting oscillator amplifier and input to the internal clock
generating circuits
XTAL2 Output from the inverting oscillator amplifier
Port 5 Port 5 is an 8-bit bidirectional I O port with internal pullups Port 5 pins that
have 1s written to them are pulled high by the internal pullups and in that state can
be used as inputs As inputs Port 5 pins that are externally being pulled low will
source current (I
external program memory if EBEN is pulled high In this application it uses strong
pullups when emitting 1s
Port 6 Port 6 is an 8-bit bidirectional I O port with internal pullups Port 6 pins that
have 1s written to them are pulled high by the internal pullups and in that state can
be used as inputs As inputs Port 6 pins that are externally pulled low will source
current (I
Memory if EBEN is pulled high In this application it uses strong pullups when
emitting 1s
EBEN E-Bus Enable input that designates whether program memory fetches take
place via Ports 0 and 2 or Ports 5 and 6 Table 1 shows how the ports are used in
conjunction with EBEN
EPSEN E-bus Program Store Enable is the Read strobe to external program
memory when EBEN is high Table 2 shows when EPSEN is used relative to PSEN
depending on the status of EBEN and EA
In normal operation ALE is emitted at a constant rate of
EA must be connected to V
Port 5 is also the multiplexed low-order address and data bus during accesses to
Port 6 emits the high-order address byte during fetches from external Program
IL
on the data sheet) because of the internal pullups
Pin Description (Continued)
IL
IL
on the data sheet) because of the internal pullups In addition
on the data sheet) because of the internal pullups
CC
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for internal program execution
Pin Description
SS
the oscillator
Although the GSC

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