87C51F Intel Corporation, 87C51F Datasheet - Page 9

• Manufacturer Part Number: 87C51F
• Description: CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
• Manufacturer: Intel Corporation

NOTES
1 Capacitive loading on Ports 0 and 2 may cause noise pulses above 0 4V to be superimposed on the V
Ports 1 2 and 3 The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins
change from 1 to 0 In applications where capacitive loading exceeds 100 pF the noise pulses on these signals may exceed
0 8V It may be desirable to qualify ALE or other signals with Schmitt triggers or CMOS-level input logic
2 Capacitive loading on Ports 0 and 2 cause the V
address lines are stabilizing
3 See Figures 6–9 for test conditions Minimum V
4 Typicals are based on limited number of samples and are not guaranteed The values listed are at room temperature and
5V
5 Under steady state (non-transient) conditions I
If I
than the listed test conditions
I
Active Mode
Idle Mode
Where Osc Freq is in MHz I
All other pins disconnected
TCLCH
CC
Figure 10 Clock Signal Waveform for I
OL
I
I
CC
CC
Max at other frequencies is given by
exceeds the test condition V
Figure 8 I
Maximum I
Maximum I
Maximum total I
Max
Max
e
TCHCL
e
e
Figure 6 I
(1 25
(0 5
OL
OL
e
CC
c
c
per port pin
per 8-bit port
Osc Freq)
5 ns
Osc Freq)
Test Condition Idle Mode
OL
CC
for all output pins
CC
Ports 1 2 and 3
vs Frequency
is in mA
a
a
4
15
OL
Port 0
may exceed the related specification Pins are not guaranteed to sink current greater
270961–7
270961–9
26 mA
10mA
15 mA
CC
71 mA
OL
CC
OH
Tests in Active and Idle Modes TCLCH
must be externally limited as follows
for Power Down is 2V
on ALE and PSEN to drop below the 0 9 V
Figure 9 I
All other pins disconnected
TCLCH
All other pins disconnected
Figure 7 I
AUTOMOTIVE 87C51FA FB FC FC-20
e
TCHCL
CC
Test Condition Power Down Mode
CC
V
e
CC
Test Condition Active Mode
5 ns
e
2 0V to 5 5V
CC
e
specification when the
270961 –11
TCHCL
OL
s of ALE and
270961 –10
270961 –8
e
5 ns
9