DSP56311CE1K34A Motorola Inc, DSP56311CE1K34A Datasheet

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DSP56311CE1K34A

Manufacturer Part Number
DSP56311CE1K34A
Description
DSP56311 Device Errata for Mask
Manufacturer
Motorola Inc
Datasheet
© Freescale Semiconductor, Inc., 1997–2004. All rights reserved.
Freescale Semiconductor
Errata
DSP56311 Device Errata for Mask
1K34A
General remark: In order to prevent the use of instructions or sequences of instructions that do not operate correctly,
we encourage you to use the “lint563” program to identify such cases and use alternative sequences of instructions.
This program is available as part of the Freescale DSP Tools CLAS package.
Silicon Errata
Errata
Number
None known.
Errata Description
DSP56311CE1K34A
Rev. 5, 11/2004
Applies
to Mask
1K34A

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DSP56311CE1K34A Summary of contents

Page 1

... This program is available as part of the Freescale DSP Tools CLAS package. Silicon Errata Errata Errata Description Number None known. © Freescale Semiconductor, Inc., 1997–2004. All rights reserved. DSP56311CE1K34A Rev. 5, 11/2004 Applies to Mask 1K34A ...

Page 2

Documentation Errata Documentation Errata Description (revised 11/9/98): XY memory data move does not work properly under one of the following two situations: The X-memory move destination is internal I/O and the Y-memory 1. move source is a register used as ...

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Description (added 1/27/98): When the SCI is configured in Synchronous mode, internal clock, and all the SCI pins are enabled simultaneously, an extra pulse of 1 DSP clock length is provided on the SCLK pin. ED9 Workaround: Enable an SCI ...

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Documentation Errata Description (added 1/7/1997; identified as Documentation Errata 2/1/99): When two consecutive LAs have a conditional branch instruction at LA-1 of the internal loop, the part does not operate properly. For example, the following sequence may generate incorrect results: ...

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Description (added 9/12/1997; modified 9/15/1997; identified as a Documentation errata 2/1/99): Programming the ESSI to use an internal frame sync (i.e., SCD2 = 1 in CRB) causes the SC2 and SC1 signals to be programmed as outputs. If however, the ...

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Documentation Errata Description (added 12/16/98; identified as a Documentation errata 2/1/99): When Stack Extension mode is enabled, a use of the instructions BRKcc or ENDDO inside do loops might cause an improper operation. If the loop is non nested and ...

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ENDDO ------ Original code: do #M,label1 ..... ..... ED33 cont. label2 ..... ..... label1 Will be replaced by: do #M, label1 ..... ..... DSP56311 Device Errata for Mask 1K34A, ...

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Documentation Errata nop_after_jmp label2 ..... ..... label1 .... .... fix_enddo_routine move #1,lc move #nop_after_jmp,la jmp 2) DO FOREVER loops =================== ED33 cont. BRKcc ----- Original code: do #M,label1 ..... ..... label2 ..... ..... label1 DSP56311 Device Errata for Mask 1K34A, ...

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Will be replaced by: do #M,label1 ..... ..... note: JScc and not Jcc nop_before_label2 label2 ..... ..... ED33 cont. label1 .... .... fix_brk_forever_routine move ssh,x:<..> address (for temporary data) move #nop_before_label2,ssh bclr #16,ssl move #1,lc rti ENDDO ------ Original code: ...

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Documentation Errata label2 label1 Will be replaced by: do #M,label1 ..... ..... ED33 cont. JSR and not JMP nop_after_jmp NOP ..... ..... label2 ..... ..... label1 .... .... fix_enddo_routine "rts" Pertains to: DSP56300 Family Manual, Section B-4.2, “General Do Restrictions.” ...

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Description (added 1/5/99; identified as a Documentation errata 2/1/99): When stack extension is enabled, the read result from stack may be improper if two previous executed instructions cause sequential read and write operations with SSH. Two cases are possible: Case ...

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Documentation Errata Description (added 11/11/99): When an instruction with all the following conditions follows a repeat instruction, then the last move will be corrupted.: The repeated instruction is from external memory. 1. The repeated instruction is a DALU instruction that ...

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Description (added on 7/6/2000) Two HI08 registers, the Host Command Vector Register (HCVR) and the Host ED43 Interrupt Vector Register (HIVR), do not have a known value at reset. That is, their initial value after reset is unknown. Workaround: To ...

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... P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com DSP56311CE1K34A Rev. 5 11/2004 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document ...

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