ADP2503-5.0-EVALZ Analog Devices, ADP2503-5.0-EVALZ Datasheet - Page 4
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ADP2503-5.0-EVALZ
Manufacturer Part Number
ADP2503-5.0-EVALZ
Description
ADP2503 Evaluation Board for 5.0V
Manufacturer
Analog Devices
Datasheet
1.ADP2503-5.0-EVALZ.pdf
(16 pages)
ADP2503/ADP2504
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
PVIN, VIN, SW1, SW2, VOUT, SYNC, EN, FB
PGND to AGND
Operating Ambient Temperature Range
Operating Junction Temperature Range
Storage Temperature Range
Soldering Conditions
ESD Human Body Model
ESD Charged Device Model
ESD Machine Model
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination.
The ADP2503/ADP2504 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient tempera-
ture (T
is within the specified temperature limits. In applications with
high power dissipation and poor thermal resistance, the maximum
ambient temperature may have to be derated. In applications
with moderate power dissipation and low PCB thermal resis-
tance, the maximum ambient temperature can exceed the
maximum limit as long as the junction temperature is within
specification limits. T
power dissipation (P
ambient thermal resistance (θ
T
J
is calculated from T
T
J
A
= T
) does not guarantee that the junction temperature (T
A
+ (P
D
× θ
D
J
JA
) of the device, and the junction-to-
A
of the device is dependent on T
)
and P
JA
D
) of the package. Maximum
using the following formula:
Rating
−0.3 V to +6 V
−0.3 V to 0.3 V
−40°C to +85°C
−40°C to +125°C
−65°C to +150°C
JEDEC J-STD-020
±2000 V
±1500 V
±100 V
A
, the
Rev. A | Page 4 of 16
J
)
θ
4-layer board. The junction-to-ambient thermal resistance is
highly dependent on the application and board layout. In applica-
tions where high maximum power dissipation exists, close
attention to thermal board design is required. The value of θ
may vary, depending on PCB material, layout, and environmental
conditions. The specified values of θ
4 inch × 3 inch circuit board. Refer to JEDEC JESD 51-9 for
detailed information on the board construction.
THERMAL RESISTANCE
θ
soldered in a circuit board for surface-mount packages.
Table 3.
Package Type
10-Lead LFCSP (QFN)
ESD CAUTION
JA
JA
of the package is based on modeling and calculation using a
are specified for the worst-case conditions, that is, a device
JA
are based on a 4-layer,
84
JA
Unit
°C/W
JA