ADP3026ARU Analog Devices, ADP3026ARU Datasheet - Page 4

• Manufacturer Part Number: ADP3026ARU
• Description: High-Efficiency Notebook Computer Power Supply Controller
• Manufacturer: Analog Devices

ADP3026
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Mnemonic
CS5
FB5
EAN5
EAO5
SS5
CLSET5
REF
AGND
CLSET3
SS3
EAO3
EAN3
FB3
CS3
PWRGD
CPOR
BST3
DRVH3
SW3
DRVL3
VIN
INTVCC
SD
PGND
DRVL5
SW5
DRVH5
BST5
Function
Current Sense Input for top N-Channel MOSFET of the 5 V Buck Converter. Connect to the drain of
the top N-channel MOSFET.
Feedback Input for the 5 V Buck Converter. Connect to the output sense point in fixed output mode.
Inverting Input of the Error Amplifier of the 5 V Buck Converter. Use for external loop compensation .
Error Amplifier Output for the 5 V Buck Converter.
Soft Start for the 5 V Buck Converter. Also used as an ON/OFF Pin.
Current Limit Setting. A resistor can be connected from AGND to CLSET5. A minimum current
800 mV Bandgap Reference. Bypass it with a capacitor (22 nF typical) to AGND. REF cannot be used
directly with an external load.
Analog Signal Ground.
Current Limit Setting. A resistor can be connected from AGND to CLSET3. A minimum current
limit is obtained by leaving it unconnected. A max current limit is obtained by connecting it to AGND.
Soft Start for the 3.3 V Buck Converter. Also used as an ON/OFF Pin
Error Amplifier Output for the 3.3 V Buck Converter.
Error Amplifier Inverting Input of the 3.3 V Buck Converter. Use for external loop compensation.
Feedback Input for the 3.3 V Buck Converter. Connect to output sense point.
Current Sense Input for Top N-Channel MOSFET of the 3.3 V Buck Converter. It should be con-
nected to the drain of the N-channel MOSFET.
Power Good Output. PWRGD goes low with no delay, whenever the 5 V output drops 7% below its
nominal value. When the 5 V output is within –3% of its nominal value, PWRGD will be released after
a time delay determined by the timing capacitor on the CPOR pin.
Connect a capacitor between CPOR and AGND to set the delay time for the PWRGD pin. A 1 µA
pull-up current is used to charge the capacitor. A manual reset (MR) function can also be implemented
by grounding this pin.
Boost Capacitor Connection for High-Side Gate Driver of the 3.3 V Buck Converter.
High-Side Gate Driver for 3.3 V Buck Converter.
Switching Node (Inductor) Connection of the 3.3 V Buck Converter.
Low-Side Gate Driver of 3.3 V Buck Converter.
Main Supply Input (6.5 V to 25 V).
Linear Regulator Bypass for the internal 5 V LDO. Bypass this pin with a 4.7 µF capacitor to
AGND.
Shutdown Control Input, Active Low. If SD = 0 V, the chip is in shutdown with very low quies-
cent current. For automatic start-up, connect SD to V
Power Ground.
Low-Side Driver for 5 V Buck Converter.
Switching Node (Inductor) Connection for 5 V Buck Converter.
High-Side Gate Driver for 5 V Buck Converter.
Boost Capacitor Connection for High-Side Gate Driver of the 5 V Buck Converter.
limit is obtained by leaving it unconnected. A max current limit is obtained by connecting it to AGND.
PRELIMINARY TECHNICAL DATA
PIN FUNCTION DESCRIPTIONS
–4–
IN
directly.
REV. PrB