IMP802 IMP Inc, IMP802 Datasheet - Page 5

• Manufacturer Part Number: IMP802
• Description: P POWER SUPPLY SUPERVISOR WITH BATTERY BACKUP SWITCH
• Manufacturer: IMP Inc

Reset Output
It is important to initialize a microprocessor to a known state in
response to specific events that could create code execution errors
and “lock-up”. The reset output of these supervisory circuits send
a reset pulse to the microprocessor in response to power-up,
power-down/power-loss or a watchdog time-out. The reset pulse
width, t
IMP690A, IMP692A, IMP802 and HIGH for the IMP805L.
Power-up reset occurs when a rising V
old, V
asserted in the appropriate logic state for the duration of t
Figure 2 shows the reset pin timing.
Power-loss or “brown-out” reset occurs when V
reset threshold resulting in a reset assertion for the duration of t
The reset signal remains asserted as long as V
and 1.1V, the lowest V
guaranteed logic-low output. To ensure logic inputs connected to
the IMP690A/692A/802 RESET pin are in a known state when
V
the logic-high IMP805L will need a pull-up resistor to V
A Watchdog time-out reset occurs when a logic “1” or logic “0” is
continuously applied to the WDI pin for more than 1.6 seconds.
After the duration of the reset interval, the watchdog timer starts
a new 1.6 second timing interval; the microprocessor must service
the watchdog input by changing states or by floating the WDI pin
before this interval is finished. If the WDI pin is held either HIGH
or LOW, a reset pulse will be triggered every 1.8 seconds (the 1.6
second timing interval plus the reset pulse width t
CC
V
WDI
BATT
V
PFI
is under 1.1V, a 100k pull-down resistor at RESET is needed:
CC
( ) IMP805L
RT
8
2
6
4
, forcing a reset condition in which the reset output is
RS
IMP690A, IMP692A, IMP802L, IMP802M,
, is typically around 200ms and is LOW for the
Battery-Switchover
Figure 1. Block Diagram
1.25V
3.5V
Circuit
CC
0.8V
IMP805L
+
for which these devices can provide a
3
+
GND
+
1.25V
Generator
Watchdog
Reset
CC
Timer
reaches the reset thresh-
+
CC
CC
1
7
5
690A_03.eps
is between V
dips below the
RS
RESET
(RESET)
PFO
V
).
OUT
CC
.
IMP690A
IMP690A
RS
RS
RT
.
.
Microprocessor Interface.
The IMP690 has logic-LOW RESET output while the IMP805 has
an inverted logic-HIGH RESET output. Microprocessors with bi-
directional reset pins (69HC11 for example) can pose a problem
when the supervisory circuit and the microprocessor output pins
attempt to go to opposite logic states. The problem can be
resolved by placing a 4.7k
and the microprocessor reset pin. This is shown in Figure 3. Since
the series resistor limits drive capabilities, the reset signal to other
devices should be buffered.
(RESET)
RESET
V
Figure 3. Interfacing with bi-directional microprocessor
PFO
V
OUT
( ) IMP805L
CC
, 692A
, 692A
+5V
+0V
+5V
+0V
+5V
+0V
+5V
+0V
+5V
+0V
IMP690A
GND
V
RESET
CC
3.0V
3.0V
Figure 2. Timing Diagram
Buffered RESET to Other System Components
, 802L, 802M, 805L
, 802L, 802M, 805L
4.7k
reset inputs
Application Information
resistor between the RESET output
V
I
OUT
BATT
= 0mA
= PFI = 3.0V
RESET
GND
t
V
RS
CC
690A_05.eps
690A_04.eps
5