25C640 Microchip Technology, Inc., 25C640 Datasheet - Page 12

• Manufacturer Part Number: 25C640
• Description: The 25AA640 is a 64K-bit Serial Electrically Erasable Prom With Memory Accessed Via a Simple Serial Peripheral Interface (SPI™) Compatible Serial Bus
• Manufacturer: Microchip Technology, Inc.

25AA640/25LC640
3.6
The Write Status Register (WRSR) instruction allows
the user to select one of four levels of protection for the
array by writing to the appropriate bits in the status reg-
ister. The array is divided up into four segments. The
user has the ability to write protect none, one, two, or
all four of the segments of the array. The partitioning is
controlled as shown in Table 3-2.
The Write Protect Enable (WPEN) bit is a non-volatile
bit that is available as an enable bit for the WP pin. The
Write Protect (WP) pin and the Write Protect Enable
(WPEN) bit in the status register control the program-
mable hardware write protect feature. Hardware write
protection is enabled when WP pin is low and the
WPEN bit is high. Hardware write protection is disabled
when either the WP pin is high or the WPEN bit is low.
When the chip is hardware write protected, only writes
to non-volatile bits in the status register are disabled.
See Table 3-3 for a matrix of functionality on the WPEN
bit.
See Figure 3-7 for WRSR timing sequence.
FIGURE 3-7:
DS21223E-page 12
SCK
SO
CS
SI
Write Status Register (WRSR)
0
0
0
WRITE STATUS REGISTER TIMING SEQUENCE
1
0
2
Instruction
0
3
0
4
0
5
High Impedance
0
6
1
7
7
TABLE 3-2:
8
BP1
6
0
0
1
1
9
Data to Status Register
10
5
11
4
ARRAY PROTECTION
BP0
0
1
0
1
12
3
2001 Microchip Technology Inc.
13
2
Array Addresses
Write Protected
(1800h - 1FFFh)
(1000h - 1FFFh)
(0000h - 1FFFh)
14
1
upper 1/4
upper 1/2
none
all
15
0