AN1146 STMicroelectronics, AN1146 Datasheet - Page 7

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AN1146

Manufacturer Part Number
AN1146
Description
I2C COMMUNICATION BETWEEN ST52X301 AND EEPROM
Manufacturer
STMicroelectronics
Datasheet
2
I
C COMMUNICATION BETWEEN ST52x301 AND EEPROM
4.1.4 ‘Stop_bit’ block
A data transfer is always terminated by a STOP condition, that is identified by a low to high transition of
the SDA line while the clock SCL is stable in the high state. This condition is performed with the
‘ stop_bit’ block (Figure 9).
Fig. 9 - Stop block
4.2 Read software routine
TM
The flow chart of the ‘Read Memory’ routine, as developed with FUZZYSTUDIO
3.0 is shown in Figure
10. After the block ‘ Initialize ’, where the communication speed and the address of the byte to be read
are set, the block ‘ start bit ’ executes a START condition.
Three bytes are then sent serially onto SDA bus. A cycle variable ‘ cont_ack ’ is used to discriminate
which byte is going to be sent: the Device Select Code (160) if ‘ cont_ack’ is ‘0’ the address byte if it is
‘1’, the Device Select Code again with the RW\ bit set to ‘1’ (i.e. a byte corresponding to 161), after a
new START condition, if ‘ cont_ack’ is ‘2’. If ‘ cont_ack ’ is ‘3’, the data is read and the STOP condition is
executed.
After each byte is sent, the microcontroller waits an acknowledgement from the memory: if the ACK is
not returned, the program provides to restart the communication protocol.
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