AN1250 STMicroelectronics, AN1250 Datasheet - Page 8

• Manufacturer Part Number: AN1250
• Description: STA014/STA015 MPEG LAYER III DECODER AND ADPCM CODEC
• Manufacturer: STMicroelectronics

AN1250 APPLICATION NOTE
Table 7. Bitrate overhead
5. ANCILLARY DATA
Ancillary data are optional user data that can be included into MP3 frames. STA014/STA015 contains 56 con-
secutive 8-bit registers corresponding to the maximum number of ancillary data that can be contained in an
MPEG frame: those registers may be read via I2C bus in order to retrieve this auxiliary information. The
ANCCOUNT_L/ANCCOUNT_H registers contain the number of ancillary data bits available within the current
MPEG frame. Moreover a status bit (see bit 0 of ISR register) is used to signal data availability: this flag should
be continuously polled by MCU in order to retrieve data when available. After all data has been retrieved MCU
should reset this bit in order to inform the embedded DSP and allow new data buffering. If this operation is not
performed an error is reported in the ERROR_CODE register.
Figure 7. Ancillary data retrieving
6. EVALUATION BOARD LAYOUT
6.1 LPT Interface
In order to allow proper communication between the 3V evaluation board and a standard LPT interface the
STA014/STA015 evaluation kit includes also the LPT interface board shown in Figure 7.
Basically the interface will perform a signal level translation between 3V and 5V in both directions.
Both 5V and 3V regulators are available on the interface: moreover the regulated supplies are available on the
J2 connector in order to supply also the STA014/STA015 evaluation board.
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Value
20
40
108 bytes
108 bytes
Header
Size
Frame Size
1908
3708
0
D00AU1187
READ ISR REGISTER
READ ANCILLARY
(0x7E .. 0xB5)
(kbit/s)
Bitrate
CLEAR ISR
REGISTER
Input
256
256
1
DATA
Bitrate (Kbit/
Output
68
68
s)
Overhead
Bitrate
6.00 %
3.00 %
Audio Frame
225 ms
450 ms