AN1350 STMicroelectronics, AN1350 Datasheet - Page 4

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AN1350

Manufacturer Part Number
AN1350
Description
STE10-100A EEPROM ACCESS AND PROGRAMMING
Manufacturer
STMicroelectronics
Datasheet
AN1350 APPLICATION NOTE
3.0 Write Operation
Write operations consist of three phases:
1. Command phase—3 bits (binary code of 101)
2. Address phase—6 bits for 256-bit to 1Kb ROMs, 8 bits for 2Kb to 4Kb ROMs.
3. Data phase—16 bits
Figure 4
and
Figure 5
show a typical write cycle that describes the action steps that need to be
taken by the driver to execute a write cycle. The timing (listed on the right side of the figures)
specifies the minimum time that the driver must wait before advancing to the next action.
During both the address phase in
Figure 4
and the data phase in
Figure
5, 1 bit is handled
during each phase cycle. Therefore, the address phase should be repeated 6 or 8 times depending
on the address length and the data phase should be repeated 16 times.
Figure 4. Write Cycle (1 of 1)
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