DS1225Y Dallas, DS1225Y Datasheet - Page 2

• Manufacturer Part Number: DS1225Y
• Description: 64k Nonvolatile SRAM
• Manufacturer: Dallas

READ MODE
The DS1225Y executes a read cycle whenever WE
(Write Enable) is inactive (high) and CE (Chip Enable)
and OE (Output Enable) are active (low). The unique
address specified by the 13 address inputs (A
fines which of the 8192 bytes of data is to be accessed.
Valid data will be available to the eight data output driv-
ers within t
put signal is stable, providing that CE and OE access
times are also satisfied. If CE and OE access times are
not satisfied, then data access must be measured from
the later occurring signal and the limiting parameter is
either t
cess.
WRITE MODE
The DS1225Y executes a write cycle whenever the WE
and CE signals are active (low) after address inputs are
stable. The latter occurring falling edge of CE or WE will
determine the start of the write cycle. The write cycle is
terminated by the earlier rising edge of CE or WE. All
address inputs must be kept valid throughout the write
cycle. WE must return to the high state for a minimum
DS1225Y
021998 2/8
CO
for CE or t
ACC
(Access Time) after the last address in-
OE
for OE rather than address ac-
0
–A
12
) de-
recovery time (t
ated. The OE control signal should be kept inactive
(high) during write cycles to avoid bus contention. How-
ever, if the output drivers are enabled (CE and OE ac-
tive) then WE will disable the outputs in t
falling edge.
DATA RETENTION MODE
The DS1225Y provides full functional capability for V
greater than 4.5 volts and write protects at 4.25 nominal.
Data is maintained in the absence of V
additional support circuitry. The DS1225Y constantly
monitors V
SRAM automatically write protects itself, all inputs be-
come “don’t care,” and all outputs become high imped-
ance. As V
power switching circuit connects the lithium energy
source to RAM to retain data. During power–up, when
V
switching circuit connects external V
connects the lithium energy source. Normal RAM oper-
ation can resume after V
CC
rises above approximately 3.0 volts, the power
CC
CC
. Should the supply voltage decay, the NV
WR
falls below approximately 3.0 volts, a
) before another cycle can be initi-
CC
exceeds 4.5 volts.
CC
to RAM and dis-
CC
ODW
without any
from its
CC