DS1238A Dallas, DS1238A Datasheet - Page 8

• Manufacturer Part Number: DS1238A
• Description: MicroManager
• Manufacturer: Dallas

POWER SWITCHING Figure 8
Note: If freshness on the DS1238A is not used,
and V
TIMING DIAGRAMS
This section provides a description of the timing diagrams shown in Figure 9 and Figure 10. Figure 9
illustrates the relationship for power down. As V
the processor is notified of an impending power failure via an active
to save critical data in nonvolatile SRAM. As the power falls further, V
monitor trip point. When V
brought high to write-protect the RAM. When the V
pin.
Figure 10 shows the power-up sequence. As V
reset occurs as well as an
maintained for the standard t
will occur. If the processor does not issue an
RST are provided to illustrate these possibilities.
BAT01
for system use.
CC
RPU
NMI
reaches V
timeout period . At a later time, if the IN pin falls below V
. Although the
CCTP
PF
, and active RST and
ST
CC
on the DS1336 may be tied to OUT1. This will free IN4, OUT4,
CC
, a watchdog reset will also occur. The second
8 of 13
slews above V
NMI
falls, the IN pin voltage drops below V
CC
may be short due to slew rates, reset will be
reaches V
BAT
BAT
, the PF pin is deactivated. An active
RST
NMI
, a power-fail is issued via the PF
are given. At this time,
. This gives the processor time
CC
crosses V
CCTP
TP
TP
. As a result,
, a new
, the power
NMI
DS1238A
CEO
NMI
and
is