DS2164Q Dallas Semiconducotr, DS2164Q Datasheet - Page 5

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DS2164Q

Manufacturer Part Number
DS2164Q
Description
G.726 ADPCM Processor
Manufacturer
Dallas Semiconducotr
Datasheet
Figure 3. ADDRESS/COMMAND BYTE
Figure 4. CONTROL REGISTER
SYMBOL
SYMBOL
(MSB)
(MSB)
ALRST
CP/ EX
AS0
X/
BYP
AS0
AS1
AS2
U/ A
IPD
A5
A4
A3
A2
A1
A0
Y
POSITION
POSITION
X/
AS1
ACB.7
ACB.6
ACB.5
ACB.4
ACB.3
ACB.2
ACB.1
ACB.0
CR.7
CR.6
CR.5
CR.4
CR.3
CR.2
CR.1
CR.0
Y
IPD
A5
Reserved. Must be 0 for proper operation
X/Y Channel Select
0 = update channel Y characteristics
1 = update channel X characteristics
MSB of device address
LSB of device address
Algorithm Select 0 (Table 2)
Algorithm Select 1 (Table 2)
Idle and Power-Down
0 = channel enabled
1 = channel disabled (output tri-stated)
Algorithm Reset
0 = normal operation
1 = reset algorithm for selected channel
Bypass
0 = normal operation
1 = bypass selected channel
Data Format
0 = A-law
1 = m-law
Algorithm Select 2 (Table 2)
Channel Coding
0 = expand (decode) selected channel
1 = compress (encode) selected channel
ALRST
A4
5 of 17
FUNCTION
FUNCTION
BYP
A3
U/ A
A2
AS2
A1
CP/ EX
(LSB)
(LSB)
A0
DS2164Q

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