DS2168 Dallas Semiconducotr, DS2168 Datasheet - Page 3

• Manufacturer Part Number: DS2168
• Description: (DS2167 / DS2168) ADPCM Processor
• Manufacturer: Dallas Semiconducotr

PIN DESCRIPTION Table 1
HARDWARE RESET
RST allows the user to reset both channel algorithms
and register contents. This input must be held low for at
least 1 ms on system power-up after master clock is
stable to assure proper initialization of the device. RST
PIN
10
12
13
14
15
16
17
18
19
20
21
22
23
24
11
1
2
3
4
5
6
7
8
9
SYMBOL TYPE
MCLK
XOUT
YOUT
CLKX
SCLK
CLKY
VDD
RST
TM0
TM1
SPS
VSS
FSX
FSY
XIN
SDI
YIN
CS
A0
A1
A2
A3
A4
A5
O
O
–
–
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Reset. A high-low-high transition clears all internal registers and reset both algo-
rithms. The device should be reset on system power-up, and/or when changing
to/from hardware mode.
Test Modes 0 and 1. Tie to V
Address Select. A0=LSB; A5=MSB. Must match address/command word to en-
able serial port write.
Serial Port Select. Tie to V
ware mode.
Master Clock. 10 MHz clock for ADPCM processing “engine”; may asynchronous
to SCLK, CLKX and CLKY.
Signal Ground. 0.0 volts
X Data In. Samples on falling edge of CLKX during selected timeslots.
X Data Clock. Data clock for X side PCM interface; must be coherent and rising
edge aligned with FSX.
X Frame Sync. 8 KHz frame sync for X side PCM interface.
X Data Out. Updated on rising edge of CLKX during selected timeslots.
Serial Data Clock. Used to write serial port registers.
Serial Data In. Data for onboard control registers. Sampled on rising edge of
SCLK.
Chip Select. Must be low to write the serial port.
Y Data Out. Updated on rising edge of CLKY during selected timeslots.
Y Frame Sync. 8 KHz frame sync for Y side PCM interface.
Y Data Clock. Data clock for Y side PCM interface; must be coherent and rising
edge aligned with FSY.
Y Data In. Samples on falling edge of CLKY during selected timeslots.
Positive Supply. 5.0 volts.
DD
SS
should also be asserted when changing to/from the
hardware mode. RST clears all bits of the control regis-
ter except IPD; IPD is set for both channels, powering
down the device.
to select the serial port, to V
for normal operation
DESCRIPTION
SS
to select the hard-
DS2167/DS2168
022698 3/15