DS2430AT Dallas Semiconducotr, DS2430AT Datasheet - Page 2

• Manufacturer Part Number: DS2430AT
• Description: 256-Bit 1-Wire EEPROM
• Manufacturer: Dallas Semiconducotr

DS2430A
SILICON LABEL DESCRIPTION
The DS2430A 256-bit 1-Wire EEPROM identifies and stores relevant information about the product to
which it is associated. This lot or product specific information can be accessed with minimal interface, for
example a single port pin of a microcontroller. The DS2430A consists of a factory-lasered registration
number that includes a unique 48-bit serial number, an 8-bit CRC, and an 8-bit Family Code (14h) plus
256 bits of user-programmable EEPROM and a 64-bit one-time programmable application register. The
power to read and write the DS2430A is derived entirely from the 1-Wire communication line. Data is
transferred serially via the 1-Wire protocol which requires only a single data lead and a ground return.
The 48-bit serial number that is factory-lasered into each DS2430A provides a guaranteed unique identity
which allows for absolute traceability. The TO-92 and TSOC packages provide a compact enclosure that
allows standard assembly equipment to handle the device easily for attachment to printed circuit boards
or wiring. Typical applications include storage of calibration constants, board identification and product
revision status.
OVERVIEW
The block diagram in Figure 1 shows the relationships between the major control and memory sections of
the DS2430A. The DS2430A has four main data components: 1) 64-bit lasered ROM, 2) 256-bit
EEPROM data memory with scratchpad, 3) 64-bit one-time programmable application register with
scratchpad and 4) 8-bit Status Memory. The hierarchical structure of the 1-Wire protocol is shown in
Figure 2. The bus master must first provide one of the four ROM Function Commands: 1) Read ROM, 2)
Match ROM, 3) Search ROM, 4) Skip ROM. The protocol required for these ROM Function Commands
is described in Figure 8. After a ROM Function Command is successfully executed, the memory
functions become accessible and the master may provide any one of the four memory function
commands. The protocol for these memory function commands is described in Figure 6. All data is read
and written least significant bit first.
64-BIT LASERED ROM
Each DS2430A contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code
(14h). The next 48 bits are a unique serial number. The last 8 bits are a CRC of the first 56 bits. (Figure
3). The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR
8
5
4
gates as shown in Figure 4. The polynomial is X
+ X
+ X
+ 1. Additional information about the Dallas
1-Wire Cyclic Redundancy Check is available in the Book of DS19xx iButton Standards. The shift
register bits are initialized to 0. Then starting with the least significant bit of the family code, 1 bit at a
th
time is shifted in. After the 8
bit of the family code has been entered, then the serial number is entered.
th
After the 48
bit of the serial number has been entered, the shift register contains the CRC value. Shifting
in the 8 bits of CRC should return the shift register to all 0s.
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