DS2438 Dallas Semiconducotr, DS2438 Datasheet - Page 14
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DS2438
Manufacturer Part Number
DS2438
Description
Smart Battery Monitor
Manufacturer
Dallas Semiconducotr
Datasheet
1.DS2438.pdf
(29 pages)
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DS2438
MEMORY/CONTROL FUNCTIONS FLOWCHART Figure 6 (continued)
MEMORY MAP
The DS2438’s memory is organized as shown in Figure 7. The memory consists of a scratchpad RAM
and storage SRAM/EEPROM. The scratchpad helps insure data integrity when communicating over the
1-Wire bus. Data is first written to the scratchpad where it can be read back. After the data has been
verified, a copy scratchpad command will transfer the data to the appropriate page in memory (pages 0-2
are primarily volatile SRAM, pages 3-7 are EEPROM). This process insures data integrity when
modifying the memory.
The DS2438’s memory is organized as 64 bytes of memory, in eight 8-byte pages. Each page has its own
scratchpad space, organized as 8 bytes of memory. When reading a scratchpad, there is a 9th byte which
may be read with a Read Scratchpad command. This byte contains a cyclic redundancy check (CRC)
byte, which is the CRC over all of the 8 bytes in the currently selected scratchpad. This CRC is
implemented in the fashion described in the section titled “CRC Generation.”
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