AN2090 Freescale Semiconductor / Motorola, AN2090 Datasheet - Page 13

no-image

AN2090

Manufacturer Part Number
AN2090
Description
Using the SC140/SC1400 Enhanced On-Chip Emulator Stopwatch Timer
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
4.1 Setting Up the PLL in Software
The clock frequency of the SC140/SC1400 core can be set up in either software or hardware. This section describes
how to set up the core in the Software Development Platform (SDP) to operate at 300 MHz using these two
alternatives. The C code to set up the PLL to 300 MHz is shown in Example 6.
#include “EOnCE_registers.h”
void PLL_setup_300MHz()
{
}
To set up the core for operation at 300 MHz, the PCTL0 and PCTL1 registers should be set to the values
0x80030003 and 0x00010000, respectively. These settings are explained in Table 3.
Freescale Semiconductor
PCTL0.PEN
PCTL0.RCP
PCTL0.MFN
PCTL0.MFI
PCTL0.MFD
PCTL0.PD
PCTL1.COE
PCTL1.PODF
Field
asm("move.l #$80030003,PCTL0");
asm("move.l #$00010000,PCTL1");
Using the SC140/SC1400 Enhanced On-Chip Emulator Stopwatch Timer, Rev. 1
(binary value)
000000000
000000000
Setting
1100
0011
Example 6. C Code to Set Up the PLL to 300 MHz
1
0
1
0
Figure 8. Programming Model of PCTL0
Figure 9. Programming Model of PCTL1
Table 3. Settings of PCTL0 and PCTL1
PLL enabled. The internal clocks are derived from the PLL output.
PLL locks with respect to the positive edge of the reference clock
MFN = 0
MFI = 24
MDF = 1
PD = 4
clock out pin receives output
PODF = 1
Description
Setting Up the System Clock Speed
13

Related parts for AN2090