CY24130 Cypress Semiconductor, CY24130 Datasheet
CY24130
Related parts for CY24130
CY24130 Summary of contents
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... Integrated phase-locked loop • Low-jitter, high-accuracy outputs • 3.3V operation Part Number Outputs CY24130-1 2 CY24130-2 2 Logic Block Diagram XIN Q OSC. Φ XOUT Pin Configuration CY24130-1, -2 16-pin TSSOP 1 XIN 2 VDD AVDD AVSS VSSL 6 7 N/C CLKA 8 Cypress Semiconductor Corporation Document #: 38-07711 Rev DataSheet U ...
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... REFCLK 148.50 27 74. Max. 7.0 – 7.0 – 125 – – Typ. Max. 3.3 3.465 – 70 – – – 18 CY24130 Units MHz MHz MHz MHz MHz MHz MHz MHz Unit V V ° Unit V °C pF MHz pF Page ...
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... Output Clock Edge Rate, Measured from 80 pF. See Figure 2. DD LOAD CLKA Peak-Peak Period Jitter V DDs 0.1 µF DUT GND Clock Output Figure 1. Duty Cycle Definitions CY24130 Min. Typ. Max – – – – – 10 0.7 – ...
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... TSSOP – Tape and Reel 16-lead TSSOP 4.40 MM Body Z16.173 PIN 6.25[0.246] 6.50[0.256] 4.30[0.169] 4.50[0.177] 16 0.19[0.007] 0.30[0.012] 1.10[0.043] MAX. GAUGE PLANE 0.076[0.003] 0.05[0.002] SEATING 0.15[0.006] PLANE CY24130 80 20 Operating Range Operating Voltage Commercial 3.3V Commercial 3.3V Commercial 3 ...
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... Document History Page Document Title: CY24130 HOTLink II™ SMPTE Receiver Training Clock Document Number: 38-07711 REV. ECN NO. Issue Date ** 314514 See ECN Document #: 38-07711 Rev DataSheet U .com Orig. of Change Description of Change RGL New Data Sheet CY24130 Page ...