CY25000 Cypress Semiconductor, CY25000 Datasheet

no-image

CY25000

Manufacturer Part Number
CY25000
Description
Programmable Spread Spectrum Clock Generator
Manufacturer
Cypress Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY25000-SX001A
Manufacturer:
CY
Quantity:
572
www.DataSheet4U.net
Cypress Semiconductor Corporation
Document #: 38-07424 Rev. *B
Features
• Wide operating output (SSCLK) frequency range
• Programmable spread spectrum with nominal 30-kHz
• Input frequency range
• Integrated phase-locked loop (PLL)
• Programmable crystal load capacitor tuning array
• Low cycle-to-cycle Jitter
• 3.3V operation
• Spread spectrum On/Off function
• Power-down or Output Enable function
XIN/CLKIN
Logic Block Diagram
— 3–200 MHz
modulation frequency
— Center spread: ±0.25% to ±2.5%
— Down spread: –0.5% to –5.0%
— External crystal: 8–30 MHz fundamental crystals
— External reference: 8–166 MHz Clock
PD#/OE
XOUT
SSON
C
XOUT
1
8
3
7
C
OSC.
XIN
VDD
2
Programmable Configuration
VSS
4
Modulation Control
PLL
with
3901 North First Street
Clock Generator for EMI Reduction
Programmable Spread Spectrum
Output
Dividers
MUX
and
Benefits
• Services most PC peripherals, networking, and consumer
• Provides wide range of spread percentages for maximum
• Eliminates the need for expensive and difficult to use higher
• Internal PLL to generate up to 200-MHz output. Able to
• Enables fine-tuning of output clock frequency by adjusting
• Suitable for most PC, consumer, and networking applica-
• Application compatibility in standard and low-power
• Provides ability to enable or disable spread spectrum with
• Enables low-power state or output clocks to High-Z state.
applications.
EMI reduction, to meet regulatory agency Electro Magnetic
Compliance (EMC) requirements. Reduces development
and manufacturing costs and time-to-market.
order crystals.
generate custom frequencies from an external crystal or a
driven source.
C
capacitors.
tions
systems.
an external pin.
Load
of the crystal. Eliminates the need for external C
San Jose
6
5
REFCLK
SSCLK
,
CA 95134
XIN/CLKIN
PD#/OE
Pin Configuration
Revised September 26, 2003
VSS
VDD
8-pin SOIC
1
2
3
4
CY25000
408-943-2600
CY25000
8
7
6
5
SSON
REFCLK
SSCLK
XOUT
Load

Related parts for CY25000

CY25000 Summary of contents

Page 1

... C of the crystal. Eliminates the need for external C Load capacitors. tions systems. an external pin. Pin Configuration CY25000 8-pin SOIC 6 REFCLK 1 XIN/CLKIN 2 VDD 5 SSCLK 3 PD#/OE VSS 4 , • San Jose CA 95134 Revised September 26, 2003 CY25000 Load XOUT 8 7 SSON 6 REFCLK 5 SSCLK • 408-943-2600 ...

Page 2

... The range for down spread is from –0.5% to –5.0%. Contact the factory for smaller or larger spread % amounts if required. The input to the CY25000 can be either a crystal or a clock signal. The input frequency range for crystals is 8–30 MHz, and for clock signals is 8–166 MHz. ...

Page 3

... Condition SSCLK, Measured REFCLK, Measured Duty Cycle of CLKIN = 50%. SSCLK from 3 to 100 MHz; REFCLK from 10 to 100 MHz. 20%–80 SSCLK from 3 to 100 MHz; REFCLK from 10 to 100 MHz. 80%–20 CY25000 Min. Typ. Max. 3.13 3.30 3. ...

Page 4

... Additional information on the CY25000 can be obtained from the Cypress web site at www.cypress.com. Product Functions Input Frequency (XIN, pin 1 and XOUT The input to the CY25000 can be a crystal or a clock. The input frequency range for crystals MHz, and for clock signal 166 MHz. C ...

Page 5

... CLKOUT (Asynchronous ) Notes: 3. Since the load capacitors (C and C ) are provided by the CY25000, no external capacitors are needed on the XIN and XOUT pins to match the crystal load XIN XOUT capacitor (C ). Only a single 0.1-µF bypass capacitor is required on the external clock is used, apply the clock to XIN (pin 1) and leave XOUT (pin 8) floating (unconnected). ...

Page 6

... Fnominal 66 65.5 65 64.5 140 160 180 200 0 CY25000 Spread Spectrum Profile: Fnom=166MHz, Fmod=30kHz, Spread%= +/- 100 120 140 160 180 Time (us) Spread Spectrum Profile: Fnom=66MHz, Fmod=30kHz, Spread%= +/- 100 120 140 160 ...

Page 7

... SSCLK Attenduation vs. VDD over Tem perature (Measured at 7th Harmonic w ith Fnom=100MHz and =15pF) -10 -12 -40C -14 25C -16 85C -18 -20 2.7 3.9 CY25000 IDD vs. SSCLK 50 100 150 200 SSC REFCLK=SSCLK REFCLK=30MHz Measured Spread% vs. VDD over Tem perature =15pF) LOA D 2.7 3 3.3 3.6 3.9 VDD (V) Spread=5.0%, C ...

Page 8

... S pre Custom Configuration Request Procedure The CY25000 is a memory programmable device that is configured in the factory. All requests must be submitted to the local Cypress Field Application Engineer (FAE) or sales repre- sentative. A sample request form (refer to “CY25000 Sample Ordering Information [6] Part Number ...

Page 9

... S08.15 STANDARD PKG. SZ08.15 LEAD FREE PKG. SEATING PLANE 0.061[1.549] 0.068[1.727] 0.004[0.102] 0.004[0.102] 0°~8° 0.0098[0.249] CY25000 MAX. PART # 0.010[0.254] X 45° 0.016[0.406] 0.0075[0.190] 0.016[0.406] 0.0098[0.249] 0.035[0.889] 51-85066-*C ...

Page 10

... Document History Page Document Title: CY25000 Programmable Spread Spectrum Clock Generator for EMI Reduction Document Number: 38-07424 REV. ECN NO. Issue Date ** 115076 06/20/02 *A 121901 12/14/02 *B 129855 10/01/03 Document #: 38-07424 Rev. *B Orig. of Change CKN New Data Sheet RBI Power-up requirements added to Operating Conditions Information RGL Removed “ ...

Related keywords