CY25100 Cypress Semiconductor, CY25100 Datasheet - Page 4

• Manufacturer Part Number: CY25100
• Description: Field- and Factory-Programmable Spread Spectrum Clock Generator for EMI Reduction
• Manufacturer: Cypress Semiconductor

Document #: 38-07499 Rev. *D
Absolute Maximum Rating
Supply Voltage (V
DC Input Voltage...................................... –0.5V to V
Storage Temperature (Non-condensing)..... –55°C to +125°C
Recommended Crystal Specifications
Operating Conditions
DC Electrical Characteristics
F
C
R
R
DL
V
T
C
F
F
F
F
T
I
I
V
V
I
I
I
C
C
I
I
Notes:
OH
OL
IH
IL
OZ
VDD
DDS
Parameter
1. Guaranteed by characterization, not 100% tested.
A
NOM
ref
SSCLK
REFCLK
MOD
PU
DD
IH
IL
LNOM
1
3
LOAD
XIN
IN
/R
[1]
Parameter
Parameter
1
or C
XOUT
Nominal Crystal Frequency
Nominal Load Capacitance
Equivalent Series Resistance (ESR)
Ratio of Third Overtone Mode ESR to
Fundamental Mode ESR
Crystal Drive Level
[1]
DD
) ........................................–0.5 to +7.0V
Output High Current
Output Low Current
Input High Voltage
Input Low Voltage
Input High Current, PD#/OE and
SSON# pins
Input Low Current, PD#/OE and
SSON# pins
Output Leakage Current
Programmable Capacitance at pin
2 and pin 3
Input Capacitance at pin 4 and pin
8
Supply Current
Standby current
Supply Voltage
Ambient Commercial Temperature
Ambient Industrial Temperature
Max. Load Capacitance @ pin 6 and pin 7
External Reference Crystal
(Fundamental tuned crystals only)
External Reference Clock
SSCLK output frequency, C
REFCLK output frequency, C
Spread Spectrum Modulation Frequency
Power-up time for all VDDs to reach minimum spec-
ified voltage (power ramp must be monotonic)
Description
Description
Description
LOAD
LOAD
DD
Parallel resonance, fundamental mode, AT cut
Internal load caps
Fundamental mode
Ratio used because typical R
less than the maximum spec
No external series resistor assumed
V
CMOS levels, 70% of V
V
V
Three-state output, PD#/OE = 0
Capacitance at minimum setting
Capacitance at maximum setting
Input pins excluding XIN and XOUT
V
REFCLK = 30 MHz, SSCLK = 66 MHz,
C
V
PD# = 0V (driven reference pulled down)
V
CMOS levels, 30% of V
= 15 pF
+ 0.5
OH
OL
in
in
DD
DD
LOAD
= 15 pF
= V
= V
= 0.5, V
= 3.45V, Fin = 30 MHz,
= 3.45V, Device powered down with
= V
DD
SS
= 15 pF, PD#/OE = SSON# = V
DD
Junction Temperature ................................ –40°C to +125°C
Data Retention @ Tj = 125°C................................> 10 years
Package Power Dissipation...................................... 350 mW
Static Discharge Voltage.......................................... > 2000V
(per MIL-STD-883, Method 3015)
– 0.5, V
DD
= 3.3V (sink)
Condition
Comments
DD
= 3.3V (source)
DD
DD
Min.
3.13
30.0
0.05
–40
0
–
8
8
3
8
1
values are much
Typ.
3.30
31.5
DD
–
–
–
–
–
–
–
–
0.7V
Min.
–10
10
10
–
–
–
–
–
–
–
–
DD
Min. Typ. Max. Unit
8
6
–
3
–
Max.
3.45
33.0
166
200
166
500
70
85
15
30
Typ.
12
12
12
60
25
15
–
–
–
–
5
0.5
–
–
–
–
CY25100
0.3V
Page 4 of 11
Max.
V
10
10
10
35
30
–
–
7
DD
30
30
25
–
2
DD
MHz
MHz
MHz
MHz
Unit
kHz
ms
pF
°C
°C
V
Unit
MHz
mW
mA
mA
mA
µA
µA
µA
µA
pF
pF
pF
pF
V
V
Ω
–