AN2103 Freescale Semiconductor / Motorola, AN2103 Datasheet - Page 3

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AN2103

Manufacturer Part Number
AN2103
Description
Local Interconnect Network (LIN) Demonstration
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
AN2103
MOTOROLA
2.1 Header
Frame
The master controls all bus traffic on the network. The master initiates
communication by transmitting a header frame with synchronization and
identifier information. Any slave, including the slave task in the master
control unit, can respond with a data frame. Only one slave can respond
to each identifier. However, any number of slaves can be configured to
recognize a particular identifier driven on the bus. The master control
unit can transfer data to any number of slaves through its slave task. i.e.
the master’s slave task responds to a header (sent by the master) and
transmits data on to the bus. All other slaves can simultaneously receive
the data frame.
The header frame consists of 3 main parts: a SYNCH BREAK signal, a
SYNCH FIELD and an IDENTIFIER. The SYNCH BREAK is used to
identify the beginning of a message frame and allow the slaves to
synchronise to the master’s bus clock. It is a unique signal that has 2
parts: a Dominant SYNCH BREAK that is longer than any regular
dominant bit stream, and a synchronisation delimiter that is required to
enable the detection of the start bit of the following SYNCH FIELD.
Figure 2
The timing specification for the SYNCH_BREAK field is dependent on
the tolerance of the slave node’s clock source. The master is always
required to transmit a dominant T
measured in the master’s time base. The slave detects a break signal if
it is dominant for longer than any regular bit stream. If the slave’s clock
source has a tolerance lower than +- 15% (F
BREAK THRESHOLD is 11 bit times (number of dominant bits required
to be recognised as a SYNCH BREAK FIELD) measured in the slave’s
time base. If the clock source’s tolerance is less than +- 2% (F
) the threshold is reduced to 9 dominant bits.
The second part of the header is the SYNCH FIELD that contains the
pattern 0x55 to allow the slave to synchronize with the master. This
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 2 SYNCH BREAK field
shows the SYNCH BREAK field.
TSYNBRK
SYNCH BREAK
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FIELD
SYNBRK
TSYNDEL
signal, that is a minimum 13 bits,
Local Interconnect Network Bus (LIN)
TOL_UNSYNCH
SYNCH
FIELD
) the SYNCH
Header Frame
TOL_SYNCH
3

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