AN2121 Freescale Semiconductor / Motorola, AN2121 Datasheet - Page 25

• Manufacturer Part Number: AN2121
• Description: JPEG2000 Arithmetic Encoding on StarCore SC140
• Manufacturer: Freescale Semiconductor / Motorola

3.2.1.2
The context table is split into two separate look-up tables in Appendix B—one for the indices and one for
the MPS associated with each context— to highlight the advantage of StarCore's numerous address
registers. Address register r2 is assigned the base address of the context table entries for the indices
whereas r4 is assigned to the base address of the MPS values. Because there are up to 16 address registers
available, there is no need to load the address registers repeatedly with the base addresses; they can retain
the base addresses for the duration of the program. In addition, two different address registers hold the
index offsets into the two separate context tables when a new context is received at the input. This allows
the address arithmetic which calculates the new position for both the Q
in parallel, as shown in Code Example 3.
In fact, there are enough registers available to split the Q
context table. There is almost no difference in processing speed between the two approaches.
3.2.2
The assembler implementation of the JPEG2000 arithmetic coder requires several change-of-flow
instructions.These instructions generally require more cycles to execute than other instructions because
they disrupt the pipeline. StarCore allows a delayed version of most jump instructions which enables the
execution of an extra instruction set while the pipeline is filled, thereby saving one or more cycles in
processing time. In addition, StarCore allows jump instructions to be combined with decisions based on
whether or not the T bit is set in the status register, as illustrated in Code Example 4.
In this example, a jump to the label CODEMPS is executed if the T bit is set. However, the
instruction occurs in parallel with this operation and the
although jump and branch instructions are normally costly in terms of cycle time, StarCore allows other
instructions to be executed at the same time, increasing overall execution speed.
3.2.3
StarCore enables an ‘if-then-else’ decision, which depends on the state of the T bit, to be made in one
instruction. This is extremely useful in the JPEG2000 arithmetic encoder, in which several such decisions
are made. The T bit in the status register determines which value to load into a variable.
In Code Example 5, if the T bit is set, d4 is loaded with #13; otherwise it is loaded with #12.
There are several instructions whose execution depends on the state of the T bit.
Multiple Address Registers
Change-of-Flow Instructions
If-Then-Else Decisions
adda r2,r6
jtd
sub
ift
Code Example 4. Jump Instruction Using Delay and the T Bit
CODEMPS
d7,d0,d0
move.w #13,d4
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Code Example 3. Multiple Address Registers
For More Information On This Product,
Code Example 5. T Bit Selects a Value
adda r4,r5
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Implementation
; r5 is index into CONTXT:MPS table
; r6 is index into CONTXT:index table
move.w (r3)+,d7
iff
sub
e
move.w #12,d4
table into four separate tables, as is done to the
command executes in the delay cycle. Thus,
StarCore Implementation in Assembler
e
and context tables to be carried out
move.w
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