AN2261 Freescale Semiconductor / Motorola, AN2261 Datasheet - Page 3

• Manufacturer Part Number: AN2261
• Description: ITU-T G.729AB Implementation on the StarCore SC140 Core
• Manufacturer: Freescale Semiconductor / Motorola

2.1 Differences Between ITU-T G.729A and ITU-T G.729AB
The following sections describe these implementation phases, indicating the performance results. Table 2
summarizes the requirements of the ITU-T G.729AB implementation.
1
These requirements are based on the results obtained for the ITU-T G.729A optimized implementation on
the SC140 core, presented in Table 3.
1
After all implementation phases, a testing phase verified and ensured the bit exactness and measured the
speed (MCPS) and code size (bytes) of the project. Section 2.1.4 on page 6 describes the test vectors. The
tests were performed on both the StarCore SC140 simulator and the MSC8101ADS board using the
Metrowerks  CodeWarrior  for StarCore Integrated Development Environment (IDE) Release 1.1.
The differences between Annex B of the ITU-T G.729 Recommendation and the ITU-T G.729A
Recommendation are determined by comparing the reference C code from the ITU-T. The result consists
of added channel data, functions, and tables for implementing Annex B. However, some data and
functions must be changed, as summarized in the following sections. The comparison of the reference
code is helpful in porting and integrating Annex B with the ITU-T G.729A optimized
implementation.The compiler for implementing and porting ITU-T G.729AB is Metrowerks
CodeWarrior
Function-level C optimizations
Function-level assembly
implementations and optimizations
Code Size
Data ROM (Tables)
Data RAM - Channel
Data RAM - Stack
Peak Performance (speed)
N = number of channels
N = number of channels
Implementation
Table 2. ITU-T G.729AB Implementation Requirements
C and assembly
Implementation Phase
Type of
C only
Requirement
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Table 3. G.729A Optimized Implementation Results
(MCPS)
Speed
Table 1. Implementation Phases (Continued)
6.81
4.7
40 KB
6 KB
3 * N
3 KB
5.5 MCPS
Size (Encoder + Decoder)
1
C optimization techniques (multisample, loop unroll, split summation, loop
merging, code factorization) with a better use of intrinsic functions to
increase performance (Section 2.3 on page 8).
Implementing selected function using assembly language in order to
increase performance (Section 2.3 on page 8).
KB
Program
32.80
28.09
(KB)
ROM
(Bytes)
Tables
4736
4736
Description
Channel
2240 x N
2240 x N
(Bytes)
Implementation Process
Data
1
RAM
®
(Bytes)
Stack
2312
2312
3