CY2CC1810 Cypress Semiconductor, CY2CC1810 Datasheet - Page 3

no-image

CY2CC1810

Manufacturer Part Number
CY2CC1810
Description
1:10 Clock Fanout Buffer with Output Enable
Manufacturer
Cypress Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY2CC18100C
Manufacturer:
CY
Quantity:
90
Part Number:
CY2CC18100C
Manufacturer:
CY
Quantity:
118
Part Number:
CY2CC18100I
Manufacturer:
CY
Quantity:
15 200
Part Number:
CY2CC1810OXI
Manufacturer:
Cypress
Quantity:
179
Company:
Part Number:
CY2CC1810OXI
Quantity:
510
Part Number:
CY2CC1810SC
Manufacturer:
CY
Quantity:
118
Document #: 38-07055 Rev. *A
Power Supply Characteristics
High-frequency Parametrics
AC Switching Characteristics
I
I
D
F
F
t
t
t
t
t
t
t
t
t
t
t
t
Parameter
Parameter
CCD
C
W
PLH
PHL
PHZ
PLZ
R
F
SK(0)
SK(p)
SK(t)
OFF
ON
Parameter
I
max
max(20)
J
&&
Propagation Delay – Low to High
Propagation Delay – High to Low
Propagation Delay – High to High Z
Propagation Delay – Low to High Z
Output Rise Time
Output Fall Time
Output Skew: Skew between outputs of the same package (in
phase)
Pulse Skew: Skew between opposite transitions of the same output
(t
Package Skew: Skew between outputs of different packages at the
same power supply voltage, temperature and package type.
Delay from OE to Driver Off
Delay from OE to Driver on
Delta I
Power Supply Current
Dynamic Power Supply
Current
Total Power Supply
Current
Jitter, Deterministic
Maximum frequency
V
Maximum frequency
V
Maximum frequency
V
Minimum pulse
V
Minimum pulse
V
PHL
DD
DD
DD
DD
DD
– t
Description
Description
CC
= 3.3V
= 3.3 V
= 2.5 V
= 3.3 V
= 2.5 V
PLH
Quiescent
)
50% duty cycle tW(50–50)
The “point to point load circuit”
|Output Jitter – Input Jitter|
50% duty cycle tW(50–50)
Standard Load Circuit.
50% duty cycle tW(50–50)
The “point to point load circuit”
20% duty cycle tW(20–80)
The “point to point load circuit”
V
V
The “point to point load circuit”
V
V
The “point to point load circuit”
V
V
The “point to point load circuit”
V
V
@ 3.3V V
(I
Max and V
V
Input toggling 50% Duty Cycle,
Outputs Open
V
Input toggling 50% Duty Cycle,
Outputs Open
fL = 40 MHz
(See Figure 1)
IN
OUT
IN
OUT
IN
OUT
IN
OUT
DD
DD
DD
= 3.0V/0.0V
= 2.4V/0.0V
= 3.0V/0.0V F= 100 MHz
= 2.4V/0.0V
= Max
@ V
= Max
= 2.3V/0.4V
= 1.7V/0.7V
= 2.0V/0.8V
= 1.7V/0.7V
Description
DD
DD
IN
= Max and V
= 3.3V ± 5%, T
= V
DD
Test Conditions
Test Conditions
F= 100 MHz
– 0.6V)
IN
= V
A
= –40 C to +85°C (See Figure 6)
DD
) – (I
fL= fMAX
OE# = V
fL=100 MHz
OE# = GND
DD
See Figure 8
See Figure 6
See Figure 8
See Figure 8
See Figure 3
See Figure 7
See Figure 2
See Figure 9
See Figure 9
See Figure 12
See Figure 11
See Figure 13
See Figure 10
@ V
DD
DD
=
Min.
Min.
COMLINK™ SERIES
2
1
Min.
1.5
1.5
Typ.
Typ
Typ.
CY2CC1810
0.8
0.8
3
3
4
3
Max.
0.63
50
25
Max
160
200
200
100
20
Max.
3.9
3.9
0.2
0.2
0.3
4.0
4.0
Page 3 of 8
Unit
MHz
MHz
MHz
Unit
mA/
mA
uA
ps
ns
V/nS
V/nS
Unit
nS
nS
nS
nS
nS
nS
nS
nS
nS

Related parts for CY2CC1810