AN2295 Freescale Semiconductor / Motorola, AN2295 Datasheet - Page 14

• Manufacturer Part Number: AN2295
• Description: Developers Serial Bootloader for M68HC08 and HCS08 MCUs
• Manufacturer: Freescale Semiconductor / Motorola

FC Protocol, Version 1, M68HC908 Implementation
Memory Allocation
The bootloader code occupies the top end of FLASH memory (the highest memory address space). This
placement allows an effective use of the FLASH block protection technique (see the specific MCU data
sheet for details).
FLASH Block Protection Register (FLBPR)
By setting a FLBPR (FLASH block protection register), all address space above this address is protected
from both intentional and unintentional erasing/re-writing. After both bootloader and FLBPR register are
programmed into memory, the bootloader code is protected from unintentional modification by user code.
For example, the MC68HC908KX8 bootloader to the PC memory allocation is:
Interrupt Vector Table Relocation
Because the FLASH block protection technique also protects the interrupt vector table from being
overwritten, some method must be used to relocate these vectors to the different locations. To do this,
the bootloader user table is used. It is a part of memory that is not protected by the FLBPR, but it is not
available to the user program. All standard interrupt vectors are pointing to this table where JMP
instructions are expected to be stored for each interrupt. The only exception is the reset vector, which
points to the start of bootloader
memory and directs execution to continue at the corresponding JMP instruction in the bootloader user
table.
14
•
•
•
•
•
•
•
•
•
$01 — Version 1, read command not implemented (bit 7)
$E000 — Start address of reprogrammable memory area
$FC80 — End address of reprogrammable memory area + 1
$FC80 — Address of
$FFDC — Start address of MCU interrupt vector table
$0040 — Length of MCU erase block
$0020 — Length of MCU write block
0,0,0,0,0,0,0,0 — Bootloader data. No strictly defined syntax; different M68HC08 implementations
provide different values (for example, the sixth value in the MC68HC908KX8 implementation is the
value of the internal clock generator (ICG) trim register after calibration). All these bootloader data
are then programmed back into the bootloader user table and can be retrieved during all
subsequent starts (e.g., to trim the MCU’s ICG to the best known value before user code start).
‘KX8-IR’,0 — Identification string, zero terminated. Information to be displayed on the PC screen.
Some M68HC908 MCUs have an FLBPR register in RAM instead of
FLASH (e.g., the MC68HC908JK/JL Families). The bootloader code sets
this register properly but the user code can eventually modify FLBPR and
erase/write the bootloader code. See
M68HC08 Family
Developer’s Serial Bootloader for M68HC08 and HCS08 MCUs, Rev. 6
Bootloader User Table
code.
MCUs).
When an interrupt occurs, the vector is fetched from protected
NOTE
FLBPR Not Usable (in Some
Freescale Semiconductor