CY2DL1504 Cypress Semiconductor, CY2DL1504 Datasheet - Page 5

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CY2DL1504

Manufacturer Part Number
CY2DL1504
Description
1:4 Differential LVDS Fanout Buffer
Manufacturer
Cypress Semiconductor
Datasheet
DC Electrical Specifications
(V
Document Number: 001-56312 Rev. *F
I
V
V
V
V
V
V
V
V
V
I
I
V
V
ΔV
I
R
C
Notes
DD
IH
IL
OZ
3. Refer to
4. I
5. V
6. Positive current flows into the input pin, negative current flows out of the input pin.
7. Refer to
IH1
IL1
IH2
IL2
IH3
IL3
ID_LVDS
ID_LVPECL
ICM
PP
OCM
P
IN
DD
Parameter
OCM
DD
= 3.3 V ± 5% or 2.5 V ± 5%; T
ID
includes current that is dissipated externally in the output termination resistors.
minimum of 400 mV is required to meet all output AC Electrical Specifications. The device is functional with V
[5]
Figure 2
Figure 4
[5]
Operating supply current
Input high voltage,
LVDS and LVPECL input clocks,
IN0, IN0#, IN1, and IN1#
Input low voltage,
LVDS and LVPECL input clocks,
IN0, IN0#, IN1, and IN1#
Input high voltage,
CLK_EN, IN_SEL, and OE
Input low voltage,
CLK_EN, IN_SEL, and OE
Input high voltage,
CLK_EN, IN_SEL, and OE
Input low voltage,
CLK_EN, IN_SEL, and OE
LVDS input differential amplitude
LVPECL input differential amplitude
Input common mode voltage
Input high current, All inputs
Input low current, All inputs
LVDS differential output voltage peak
to Peak, Single-ended
LVDS differential output common
mode voltage
Change in V
complementary output states
Output leakage current
Internal pull-up/pull-down resistance,
LVCMOS logic inputs
Input capacitance
on page 7.
on page 7.
OCM
Description
between
A
= 0 °C to 70 °C (Commercial) or –40 °C to 85 °C (Industrial))
All LVDS outputs terminated with a load of
100 Ω
V
V
V
V
See
See
See
Input = V
Input = V
V
R
V
R
V
R
OE = V
CLK_EN has pull-up only
IN_SEL has pull-down only
OE has pull-up only
Measured at 10 MHz; per pin
DD
DD
DD
DD
DD
DD
DD
TERM
TERM
TERM
= 3.3 V
= 3.3 V
= 2.5 V
= 2.5 V
Figure 3
Figure 3
Figure 3
= 3.3 V or 2.5 V,
= 3.3 V or 2.5 V,
= 3.3 V or 2.5 V,
[3, 4]
= 100 Ω between Q and Q# pairs
= 100 Ω between Q and Q# pairs
= 100 Ω between Q and Q# pairs
SS,
DD
SS
V
[6]
[6]
OUT
on page 7
on page 7
on page 7
Condition
= 0.75V – 1.75V
ID
minimum of greater than 200 mV.
[3, 7]
[3, 7]
[3, 7]
1.125
–150
–0.3
–0.3
–0.3
Min
250
–15
2.0
1.7
0.4
0.4
0.5
60
V
V
V
V
CY2DL1504
DD
DD
DD
DD
1.375
Max
150
470
165
0.8
0.7
0.8
1.0
61
50
15
3
+ 0.3
+ 0.3
+ 0.3
– 0.2
Page 5 of 14
Unit
mA
mV
mV
μA
μA
μA
pF
V
V
V
V
V
V
V
V
V
V
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