CY2DP3110 Cypress Semiconductor, CY2DP3110 Datasheet - Page 7

• Manufacturer Part Number: CY2DP3110
• Description: Differential Clock/Data Fanout Buffer
• Manufacturer: Cypress Semiconductor

Document #: 38-07469 Rev.*G
Ordering Information
CY2DP3110AI
CY2DP3110AIT
Figure 9. Termination for LVPECL to HTSL interface for VCC=2.5V would use X=50 Ohms, Y=2300 Ohms, and Z=1000
Ohms. See application note titled, “PECL Translation, SAW Oscillators, and Specs” for other signalling standards
Figure 8. Low-voltage Positive Emitter-coupled Logic (LVPECL) to a Low-voltage Differential Sig-
Part Number
C Y 2 D P 3 1 1 0
V C C = 3 . 3 V
One output is shown for clarity
V E E = 0 V
32-pin TQFP
32-pin TQFP – Tape and Reel
VDD-2
X
naling (LVDS) Interface
Package Type
Z
and supplies.
VCC
Z o = 5 0 o h m
Y
5 "
L V P E C L t o
5 "
L V D S
3 . 3 V
3 . 3 V
( 2 p l a c e s )
1 2 0 o h m
3 3 o h m
1 2 0 o h m
Industrial, –40° to 85°C
Industrial, –40° to 85°C
FastEdge™ Series
( 2 p l a c e s )
L V D S
5 1 o h m
Product Flow
CY2DP3110
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