CY2XP31 Cypress Semiconductor, CY2XP31 Datasheet - Page 9

• Manufacturer Part Number: CY2XP31
• Description: 312.5 MHz LVPECL Clock Generator
• Manufacturer: Cypress Semiconductor

Document History Page
Document #: 001-06385 Rev. *H
Document Title: CY2XP31 312.5 MHz LVPECL Clock Generator
Document Number: 001-06385
Revision
*G
*A
*B
*C
*D
*E
*F
*H
**
1337067
2669117
2700242
2718433
2767308
2896121
3219081
422680
506198
ECN
JWK / KVM
KVM/PYRS
WWZ/HMT
Change
Orig. of
AESA
BASH
KVM/
KVM
KVM
RGL
RGL
/ARI
Submission
03/05/2009 Changed crystal frequency to 25 MHz only; removed other frequencies;
04/30/2009 Typos: changed VCC to VDD
06/12/2009 No change. Submit to ECN for product launch.
09/22/2009 Add I
03/19/2010 Updated Package Diagram (Figure 12)
04/07/2011
See ECN
See ECN
See ECN
Date
New data sheet
Supplied values in TBDs, Change status from Advance Information to
Preliminary
Changed VCC* to VDD*, VEE to VSS, Gave pins 1 and 8 the same name
(VDD),
Added MSL and CIN specifications, Removed pull up from pin 5,
Changed V
Added commercial temperature, Changed supply filtering recommendations
Removed alternate termination figure, Cleaned up several drawings
Fixed cross references and edited data sheet for template compliance, Title
change
output frequencies adjusted accordingly, Changed phase jitter value,
Removed MSL spec
Changed IIL and IIH values, Changed rise / fall time value from 350 ps to
500 ps
Changed max junction temp from 125 ° C to 135 ° C, Added thermal resistance
Clarified that IDD is with outputs loaded, Changed Data Sheet Status to
Final.
OE pin capacitance changed from 7pF to 15pF
Changed IDD footnote
Reformatted AC & DC tables
Added specs CINX and IOZ
Added OE timing, and startup timing
Added OE waveforms
Added IDD for 2.5 V
Changed footnote about external power dissipation
Change parameter name for I
Remove I
Add footnote reference to C
Add max limit for T
Change T
Template and style updates as per current Cypress standards.
Added ordering code definitions, acronyms, and units of measure.
Updated package diagram to *C.
DD
spec for unterminated outputs
DD
LOCK
IL
, V
footnote about externally dissipated current
max from 10 ms to 5 ms
IH
, I
R
IH
, T
, I
F
DD
: 1.0 ns
Description of Change
, I
DDA
IN
DD
and C
, V
(terminated outputs) from I
OH
INX
, V
:not 100% tested
OL
, t
R
and t
F
specifications,
DD
CY2XP31
to I
Page 9 of 10
DDT
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