AN2528D Freescale Semiconductor / Motorola, AN2528D Datasheet - Page 15
AN2528D
Manufacturer Part Number
AN2528D
Description
Standard Space Vector Modulation TPU Function Set (svmStd)
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
1.AN2528D.pdf
(28 pages)
bottom channel
bottom channel
time slot sequence
time slot sequence
top channel
top channel
TST
TST
H
H
Standard Space Vector Modulation TPU Function Set (svmStd)
The time slot sequences at the top of both figures shows when a state of a high
(H), middle (M) or low (L) priority is serviced in the worst case. To calculate the
MPW follow these steps:
TST
TST
•
•
•
Freescale Semiconductor, Inc.
Figure 8. Worst case timing – case two
For More Information On This Product,
Get the lengths of the longest states.
–
Decide which case of timing can occure.
–
Calculate MPW based on case one or case two.
–
M
M
It is necessary to know the lengths of the longest states within all
functions of each priority group. The initialization states are not
considered – only the running states. Let's denote H as the time
period of the longest state within all functions running on high priority
(Do not consider svmStd functions). Let's denote M as the time
period of the longest state within all functions running on middle
priority and L as the time period of the longest state within all
functions running on low priority.
The first case can occure when the DT (in IMB clock cycles) is less
than TST + H + TST + M + TST+4 + LH_C5 + TST+4 + L (see
8) that is 4*TST + 8 + H + M + L + LH_C5 that is 76 + H + M + L IMB
clock cycles.
if DT (in IMB clock cycles) < 76 + H + M + L
then – case one
else – case two
In case one the MPW is (according to
TST + H + TST + M + TST+4 + LH_C5 + TST + L + TST+4 + HL – DT
that is 92 + H + M + L – DT IMB clock cycles.
MPW (in IMB clock cycles) = 92 + H + M + L – DT
TST+4
TST+4
DT
DT
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LH_C5
LH_C5
H
H
TST+4
TST+4
L
L
TST
TST
latency
latency
H
H
Figure
TST
TST
MPW
MPW
M or L
M or L
Detailed Function Description
7)
TST+4
TST+4
HL
HL
H
H
AN2528/D
Figure
15