AN2536 Freescale Semiconductor / Motorola, AN2536 Datasheet - Page 11

• Manufacturer Part Number: AN2536
• Description: MC9328MX1 and MC9328MXL High Speed Layout Design Guidelines
• Manufacturer: Freescale Semiconductor / Motorola

MOTOROLA
of the bounce can be large enough to trigger other devices on the PCB. In synchronous designs, ground
bounce is less often a problem because synchronous outputs have enough time to settle before the next
clock edge. Also, synchronous circuits are not as likely to be falsely triggered by a voltage spike on a quiet
output. Capacitive loading on the switching outputs and quiet outputs affect ground bounce differently.
Minimizing Lead Inductance—Socket usage and PCB trace length are two elements of L2, as shown in the
previous diagram. Sockets can cause ground bounce voltage to increase by as much as 100%. Eliminating
sockets can often reduce the ground bounce on the PCB. The length of the PCB trace has a much smaller
effect on ground bounce as compared to sockets. For PCBs with a ground plane, the voltage drop across
the inductance (L3) of the PCB trace between the device and the PCB location where other devices in the
system reference ground is negligible, because L3 is significantly less than L2. The inductance in a 3-inch
trace increases ground bounce for a quiet output by approximately 100 mV. Therefore, keep trace length to
a minimum. As traces become longer, transmission line effects may cause other noise problem.
Using multi-layer PCBs that provide separate VCC and ground planes can also reduce the ground bounce
caused by PCB trace inductance. Wire wrapping the VCC and ground supplies usually increases the
amount of ground bounce. To reduce unwanted inductance, use low-inductance bypass capacitors between
the VCC supply pins and the board ground plane, as close to the package supply pins as possible. The
silicon requires low ESR decoupling surface mount capacitors of 0.01 uF to 0.1 uF to be used in parallel to
reduce ground bounce. Adding a 0.001 uF capacitor in parallel to these capacitors filters high frequency
noise (>100 MHz).
Termination Schemes
Mismatched impedance causes signals to reflect back and forth along the lines, which causes ringing at the
load receiver. The ringing reduces the dynamic range of the receiver and can cause false triggering. To
eliminate reflections, the impedance of the source (Z
as the impedance of the load (Z
Simple Parallel Termination—In a simple parallel termination scheme, the terminating resistor (R
equal to the line impedance. Place the termination resistor as close to the load as possible to be efficient.
Thevenin Parallel Termination—An alternative parallel termination scheme uses a Thevenin voltage
divider. The terminating resistor is split between R1 and R2, which equals the line impedance when
combined. Although this scheme reduces the current drawn from the source device, it adds current drawn
from the power supply because the resistors are tied between VCC and GND.
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Simple parallel termination
Thevenin parallel termination
Active parallel termination
Series-RC parallel termination
Series termination
Freescale Semiconductor, Inc.
For More Information On This Product,
L
Figure 15. Simple Parallel Termination
). This section discusses the following signal termination schemes:
MC9328MX1/MXL Application Note
Go to: www.freescale.com
S
) must equal the impedance of the trace (Z
Design Consideration
o
), as well
T
) is
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