EM6152A EM Microelectronic, EM6152A Datasheet - Page 7

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EM6152A

Manufacturer Part Number
EM6152A
Description
5V Automotive Regulator
Manufacturer
EM Microelectronic
Datasheet
www.DataSheet4U.com
Functional Description
V
The power-on reset and the power-down reset are
generated as a response to the external voltage level
applied on the V
reset is asserted or released (V
external voltage divider between V
Fig. 8. A part of V
reference. To determine the values of the divider, the
leakage current at V
the current consumption of the divider itself. Low resistor
values will need more current, but high resistor values will
make the reset threshold less accurate at high temperature,
due to a possible leakage current at the V
of the two resistors (R
formula is:
Example: choosing R
V
At power-up the reset output (
When V
held low for an additional power-on-reset (POR) delay T
(defined with the external resistor connected at R
The T
V
the microprocessor’s crystal oscillator time to start and
stabilize and ensures correct recognition of the reset signal
to the microprocessor.
The
down reset whenever V
reaction time of the internal comparator to the voltage level
on V
Timer Programming
The on-chip oscillator allows the user to adjust the power-on
reset (POR) delay T
changing the resistor value of the external resistor R
connected between the pin R
closed and open window times (T
watchdog reset pulse width (T
dependent, will vary accordingly. The watchdog time T
can be obtained with figures 9 to 12 or with the Excel
application EM6151ResCalc.xls available on EM website.
T
tolerances increased by 1% (For Version 53, T
fourth of T
Note that the current consumption increases as the
frequency increases.
Voltage Regulator
The EM6152A has a 5 V, 150 mA, low dropout voltage
regulator. The low supply current makes the EM6152A
particularly suitable for automotive systems which remain
continuously powered. The input voltage range is 4 V to 40
V for operation and the input protection includes both
reverse battery (42 V below ground) and load dump
(positive transients up to 45 V). There is no reverse current
flow from the OUTPUT to the INPUT when the INPUT
equals V
need to implement (with capacitance) a minimum power
supply hold-up time in the event of power failure. To achieve
Copyright © 2006, EM Microelectronic-Marin SA
06/06, rev. B, Prelim.
POR
IN
RESET
DD
Monitoring
voltage drops out and recovers. The T
IN
RES
is equal to T
POR
is typically 3 μ s.
=4.56 V (typical) for version V50 and V53.
IN
V
SS
WD
delay prevents repeated toggling of
RESET
becomes greater than V
output goes active low generating the power-
. This feature is important for systems which
).
R
= V
IN
REF
DD
IN
input. The threshold voltage at which
WD
1
1
POR
must be taken into account as well as
x (1 + R
is compared to the internal voltage
+ R
IN
= 200 k Ω and R
with the minimum and maximum
falls below V
and the watchdog time T
2
) should stay below 500 k Ω . The
OSC
RES
1
/R
RESET
CW
and V
2
).
DD
) is held low (see Fig. 5).
WDR
REF
and T
) is determined by the
and V
REF
, the
), which are T
SS
2
. The sensitivity or
OW
IN
(see Fig. 8). The
= 100 k Ω gives
POR
SS,
input. The sum
) as well as the
RES
as shown on
RES
delay allows
POR
output is
OSC
even if
is one
WD
pin).
POR
OSC
TCL
WD
by
7
good load regulation a 10 μ F capacitor (or greater) is
needed on the INPUT (see Fig. 8). Tantalum or aluminum
electrolytic are adequate for the 10 μ F capacitor; film types
will work but are relatively expensive. Many aluminum
electrolytic have electrolytes that freeze at about –30°C, so
tantalums are recommended for operation below –25°C.
The important parameters of the 10 μ F capacitor are an
effective series resistance of lower than 4 Ω and a resonant
frequency above 500 kHz.
A 10 μ F capacitor (or greater) and a 100 nF capacitor are
required on the OUTPUT to prevent oscillations due to
instability. The specification of the 10 μ F capacitor is as per
the 10 μ F capacitor on the INPUT (see previous paragraph).
The EM6152A will remain stable and in regulation with no
external load and the dropout voltage is typically constant as
the input voltage fall below its minimum level (see Table 2).
These features are especially important in CMOS RAM
keep-alive applications.
Power Dissipation
Care must be taken not to exceed the maximum junction
temperature (+125°C). The power dissipation within the
EM6152A is given by the formula:
The maximum continuous power dissipation at a given
temperature can be calculated using the formula:
where R
the ambient and is specified in Table 2. Note that R
given in Table 2 assumes that the package is soldered to a
PCB (see figure 16). The above formula for maximum power
dissipation assumes a constant load (i.e. >100 s). The
transient thermal resistance for a single pulse is much lower
than the continuous value.
CAN-Bus Sleep Mode Detector (version 55)
When the microcontroller goes into a standby mode, it
implies that it does not send any pulses on the TCL input of
the EM6152. After three reset pulse periods (T
T
resistor of 1 M Ω , and it will have a reset pulse of typically 3
ms every 1 second on the RES output. When a TCL edge
(rising or falling) appears on the TCL input or the power
supply goes down and up, the circuit switches to the R
Watchdog Timeout Period Description
The watchdog timeout period is divided into two periods, a
closed window period (T
(T
during the open window period T
low for a time T
input, the cycle is restarted with a close window period.
For example if T
40ms and T
When V
set low for the time T
disabled.
WDR
OW
P
), see Fig. 4. If no pulse is applied on the
) on the RES output, the circuit switches on an internal
TOTAL
IN
th(j-a)
recovers after a drop below V
= (V
WDR
is the thermal resistance from the junction to
P
MAX
INPUT
= 2.5ms.
WDR
WD
= ( 125°C – T
. When a pulse is applied on the
= T
– V
POR
OUTPUT
POR
during which any
CW
) and an open window period
= 100ms, T
) × I
A
www.emmicroelectronic.com
EM6152A
) / R
OUTPUT
OW
, the
th(j-a)
REF
CW
+ (V
RES
, the pad
TCL
= 80 ms, T
INPUT
output goes
CW
activation is
) × I
TCL
+ T
RES
SS
OSC
OW
input
OW
TCL
th(j-a)
.
is
+
=

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