SP8064 Sipex Corporation, SP8064 Datasheet - Page 2

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SP8064

Manufacturer Part Number
SP8064
Description
High Speed 10-channel Photo Detector IC
Manufacturer
Sipex Corporation
Datasheet
GAIN MODE SELECTION
* If no logic inputs are applied to gain select pins, Power Down Mode is default mode.
PIN ASSIGNMENTS
BOARD LAYOUT AND GROUNDING
To obtain the best performance from the SP8064, a printed circuit board with ground plane is
required. Ground pins (pin #6) should be connected to the ground plane. High quality, low
series resistance ceramic 0.1uF bypass capacitors should be used at the Vcc and Vref pins
(pins #3 and #14). These capacitors must be located as close to the pins as possible. A Vref
decoupling capacitor to ground should be used. The traces connecting the pins to the ground
plane, Vcc, Vref, and bypassing capacitors must be kept short and should be made as wide
as possible.
Rev 0.He (09-26-05)
SIPEX RESERVES THE RIGHT TO MAKE CHANGES TO THIS DATASHEET. CALL FOR UPDATES: 1-408-934-7500.
SIPEX CONFIDENTIAL, PRELIMINARY & PROPRIETARY. DO NOT DISTRIBUTE OR
COPY
Land #
Writing CD-R (average)
10
11
12
13
14
15
16
Writing CD-R (sample)
1
2
3
4
5
6
7
8
9
Reading DVD-ROM
Power Down Mode*
Reading DVD+RW
Reading CD-ROM
Writing DVD+RW
Reading CD-RW
Writing DVD+R
Writing CD-RW
Gain Mode
Pin Name
GND
RF+
R/W
Vref
Vcc
RF-
C/D
H/L
G
A
D
B
C
H
E
F
Output of A channel
Output of D channel
Supply voltage. Bypass to GND with ceramic capacitor 0.1uF
Output of RF+ channel. RF+ = A + B + C + D
Output of RF- channel. RF- = - (A + B + C + D)
Ground pin
Output of B channel
Output of C channel
Output of H channel
Output of F channel
Mode switch input.
Mode switch input.
Mode switch input.
Reference voltage. Bypass to GND with ceramic capacitor 0.1uF
Output of G channel
Output of E channel
SP8064 Ten-Channel Photo detector IC
R/W
X
0
0
0
0
0
1
1
1
1
PRELIMINARY
0/Hi-Z
Hi-Z
Hi-Z
H/L
0
0
1
1
0
1
1
C/D
0
1
1
0
1
0
1
0
1
0
Pin Function
Copyright 2005 Sipex Corporation
SP8064
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