MTD508 Myson Technology, MTD508 Datasheet - Page 14

• Manufacturer Part Number: MTD508
• Description: 8-port Switch
• Manufacturer: Myson Technology

www.DataSheet4U.com
“R/W” means read/writable.
Reg No.
Reg No.
7
8
9
1
2
3
4
15-11
15-11
15-11
15-8
15-8
15-8
10-0
10-0
10-0
15-8
7-0
7-0
7-0
7-0
Bit
Bit
Myson-Century Technology
StsReg1
StsReg1
StsReg2
StsReg3
CtlReg7
CtlReg8
CtlReg1
Name
Name
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
bit[4:0]: output port4-0 RXDMA fifofull;
bit[5]: reserved.
bit[12:8]: output port4-0 TXDMA TPUR (fifoempty);
bit[15:13]: reserved.
Status Register 1
0: BufBistDone;
1: BufBistErr;
2: BufInitDone;
3: AddrTblBistDone;
4: AddrTblBistErr;
5: LthTblBistDone;
6: LthTblBistErr;
7: MemBistDone;
8: MemBistErr;
9: EEDone;
10: FreeCntls0;
15-11: reserved.
Control Register 7
bit[4:0]: output MII polling port4-0 flow control information;
bit[7:5]: reserved.
bit[12:8]: output MII polling port 4-0 link information;
bit[15:13]: reserved.
“1” means flow control enable or link good.
Control Register 8
bit[4:0]: output MII polling port4-0 speed information;
bit[7:5]: reserved.
bit[12:8]: output MII polling port4-0 full information;
bit[15:13]: reserved.
“1” means 100M or full duplex.
bit[10:0]: output Port Tx queue head value.
Reserved.
bit[10:0]: output Port Tx queue tail value.
Reserved.
bit[10:0]: output Port Tx queue count value.
Reserved.
bit[7:0]: select Port VLAN group.
Reserved.
Global Registers
Port Registers
Status Register 1
Status Register 2
Status Register 3
Description
Description
MTD508
page 14 of 19
Default
Default