KSZ8893-MQL Micrel Semiconductor, Inc., KSZ8893-MQL Datasheet - Page 82
KSZ8893-MQL
Manufacturer Part Number
KSZ8893-MQL
Description
Integrated 3-Port 10/100 Managed Switch with PHYs
Manufacturer
Micrel Semiconductor, Inc.
Datasheet
1.KSZ8893-MQL.pdf
(106 pages)
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Register 111 (0x6F): TOS Priority Control Register 15
Bit
7-6
5-4
3-2
1-0
Registers 112 to 117
Registers 112 to 117 contain the switch engine’s MAC address. This 48-bit address is used as the Source
Address for the MAC’s full duplex flow control (PAUSE) frame.
Register 112 (0x70): MAC Address Register 0
Bit
7-0
Register 113 (0x71): MAC Address Register 1
Bit
7-0
Register 114 (0x72): MAC Address Register 2
Bit
7-0
Register 115 (0x73): MAC Address Register 3
Bit
7-0
Register 116 (0x74): MAC Address Register 4
Bit
7-0
Register 117 (0x75): MAC Address Register 5
Bit
7-0
Micrel
November 2005
Name
Name
MACA[47:40]
Name
Name
Name
Name
Name
DSCP[127:126]
DSCP[125:124]
DSCP[123:122]
DSCP[121:120]
MACA[39:32]
MACA[31:24]
MACA[23:16]
MACA[15:8]
MACA[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Description
Description
Description
Description
Description
Description
The value in this field is used as the frame’s
priority when bits [7:2] of the frame’s IP
TOS/DiffServ/Traffic Class value is 0xFC.
The value in this field is used as the frame’s
priority when bits [7:2] of the frame’s IP
TOS/DiffServ/Traffic Class value is 0xF8.
The value in this field is used as the frame’s
priority when bits [7:2] of the frame’s IP
TOS/DiffServ/Traffic Class value is 0xF4.
The value in this field is used as the frame’s
priority when bits [7:2] of the frame’s IP
TOS/DiffServ/Traffic Class value is 0xF0.
82
Default
0x00
Default
0x10
Default
0xA1
Default
0xFF
Default
0xFF
Default
0xFF
Default
00
00
00
00
KSZ8893MQL/MQLI
M9999-111705
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