MCP6566 Microchip Technology Inc., MCP6566 Datasheet - Page 15

• Manufacturer Part Number: MCP6566
• Description: 1.8v Low Power Open-drain Output Comparator
• Manufacturer: Microchip Technology Inc.

4.0
The MCP6566/6R/7/9 family of
comparators are fabricated on Microchip’s state-of-the-
art CMOS process. They are suitable for a wide range
of high speed applications requiring low power
consumption.
4.1
4.1.1
The input stage of this family of devices uses uses two
differential input stages in parallel. This configuration
provides three regions of operation, one operates at
low input voltages, one at high input voltages, and one
at mid input voltage. With this topology, the input volt-
age range is 0.3V above V
while providing low offset voltage through out the com-
mon mode range. The input offset voltage is measured
at both V
operation.
The
hysteresis
offset accuracy and large enough to eliminate output
chattering caused by the comparator’s own input noise
voltage
offset voltage (V
(input-referred) low-high and high-low trip points. Input
hysteresis voltage (V
the same trip points.
FIGURE 4-1:
comparators’ internal hysteresis eliminates
output chatter caused by input noise voltage.
4.1.2
The ESD protection on the inputs can be depicted as
shown in
protect the input transistors, and to minimize input bias
current (I
when they try to go more than one diode drop below
V
© 2009 Microchip Technology Inc.
SS
. They also clamp any voltages that go too far
-1
-2
-3
8
7
6
5
4
3
2
1
0
MCP6566/6R/7/9
E
V
APPLICATIONS INFORMATION
Comparator Inputs
B
SS
NI
DD
). The input ESD diodes clamp the inputs
V
Figure
.
NORMAL OPERATION
INPUT VOLTAGE AND CURRENT
LIMITS
HYST
= 5.0V
V
- 0.3V and V
Figure 4-1
OUT
that is small enough to maintain input
OS
4-1. This structure was chosen to
) is the center (average) of the
Time (100 ms/div)
HYST
The MCP6566/6R/7/9
depicts this behavior. Input
DD
) is the difference between
family
DD
+ 0.3V to ensure proper
Hysteresis
V
and 0.3V below V
IN
–
has
open-drain output
internally-set
25
20
15
10
5
0
-5
-10
-15
-20
-25
-30
SS
,
above V
allow normal operation, and low enough to bypass ESD
events within the specified limits.
FIGURE 4-2:
Structures.
In order to prevent damage and/or improper operation
of these amplifiers, the circuits they are in must limit the
currents (and voltages) at the V
Section 1.1 “Maximum Ratings*” at the beginning of
Section 1.0 “Electrical Characteristics”).
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(V
the resistors R
out of the input pin. Diodes D
pin (V
When implemented as shown, resistors R
limit the current through D
FIGURE 4-3:
Inputs.
It is also possible to connect the diodes to the left of the
resistors R
the diodes D
mechanism. The resistor then serves as in-rush current
limiter; the DC current into the input pins (V
V
IN
IN
–) should be very small.
+ and V
V
V
V
V
V
IN
IN
1
DD
2
SS
+
+ and V
DD
R
R
; their breakdown voltage is high enough to
1
1
2
Bond
Bond
Bond
Pad
Pad
Pad
MCP6566/6R/7/9
IN
≥
and R
1
R
≥
R
–) from going too far below ground, and
1
and D
1
2
D
V
V
and R
1
SS
SS
IN
D
2
–) from going too far above V
– (minimum expected V
– (minimum expected V
. In this case, the currents through
2
2
need to be limited by some other
2
Simplified Analog Input ESD
Protecting the Analog
limit the possible current drawn
Stage
Input
1
2 mA
2 mA
MCP650X
and D
+
–
1
R
and D
V
3
IN
DD
+ and V
2
.
2
DS22143A-page 15
Bond
prevent the input
Pad
V
PU
1
IN
R
and R
2
1
– pins (see
)
Figure 4-1
4
)
V
IN
IN
V
OUT
+ and
–
2
also
DD
.