XC3142A-4VQ100I Xilinx, Inc., XC3142A-4VQ100I Datasheet - Page 31

• Manufacturer Part Number: XC3142A-4VQ100I
• Description: Field Programmable Gate Array
• Manufacturer: Xilinx, Inc.

Program Readback Switching Characteristics
Notes: 1. During Readback, CCLK frequency may not exceed 1 MHz.
November 9, 1998 (Version 3.1)
RTRIG
RDATA Output
CCLK
DONE/PROG
2. RETRIG (M0 positive transition) shall not be done until after one clock following active I/O pins.
3. Readback should not be initiated until configuration is complete.
4. T
RTRIG (M0)
(OUTPUT)
M1 Input/
CCLK(1)
CCLR
R
is 5 s min to 15 s max for XC3000L.
Description
RTRIG High
RTRIG setup
RDATA delay
High time
Low time
3
T
HI-Z
CCRD
4
T
CCL
1 T
2
RTH
T
RTCC
5
XC3000 Series Field Programmable Gate Arrays
READBACK OUTPUT
1
2
3
4
5
T
T
T
T
T
Symbol
RTH
RTCC
CCRD
CCHR
CCLR
VALID
4
T
CCL
Min
250
200
0.5
0.5
READBACK OUTPUT
Max
100
VALID
5
X6116
Units
ns
ns
ns
s
s
7-33
7