IDT72V271LA10PF8 IDT, Integrated Device Technology Inc, IDT72V271LA10PF8 Datasheet - Page 22
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IDT72V271LA10PF8
Manufacturer Part Number
IDT72V271LA10PF8
Description
IC FIFO SS 16384X18 10NS 64QFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet
1.IDT72V271LA10PFG.pdf
(27 pages)
Specifications of IDT72V271LA10PF8
Function
Synchronous
Memory Size
288K (16K x 18)
Access Time
10ns
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Configuration
Dual
Density
288Kb
Access Time (max)
6.5ns
Word Size
9b
Organization
32Kx9
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
TQFP
Clock Freq (max)
100MHz
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Supply Current
55mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Rate
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
72V271LA10PF8
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT72V271LA10PF8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
NOTE:
1. OE = LOW.
D
Q
IDT72V261LA/72V271LA
3.3 VOLT CMOS SuperSync FIFO™ 16,384 x 9 and 32,768 x 9
WCLK
RCLK
0
0
REN
WEN
- Q
- D
LD
LD
7
7
t
CLKH
t
CLKH
PAE OFFSET
DATA IN OUTPUT
t
Figure 14. Parallel Loading of Programmable Flag Registers (IDT Standard and FWFT Modes)
(LSB)
CLK
t
REGISTER
CLK
Figure 15. Parallel Read of Programmable Flag Registers (IDT Standard and FWFT Modes)
t
ENS
t
t
LDS
DS
t
t
ENS
LDS
t
t
CLKL
CLKL
t
PAE OFFSET
t
t
t
LDH
t
t
ENH
DH
ENH
A
LDH
(MSB)
PAE OFFSET
(LSB)
PAF OFFSET
(LSB)
22
PAE OFFSET
(MSB)
PAF OFFSET
(MSB)
t
t
PAF OFFSET
COMMERCIAL AND INDUSTRIAL
ENH
LDH
(LSB)
t
DH
t
t
ENH
LDH
t
TEMPERATURE RANGES
A
JANUARY 30, 2009
PAF OFFSET
(MSB)
4673 drw 17
4673 drw 18