IDT72V261LA20TF IDT, Integrated Device Technology Inc, IDT72V261LA20TF Datasheet - Page 11
![IC FIFO SS 8192X18 20NS 64QFP](/photos/31/27/312736/64pin_tqfp_sml.jpg)
IDT72V261LA20TF
Manufacturer Part Number
IDT72V261LA20TF
Description
IC FIFO SS 8192X18 20NS 64QFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet
1.IDT72V271LA10PFG.pdf
(27 pages)
Specifications of IDT72V261LA20TF
Function
Synchronous
Memory Size
144K (8K x 18)
Data Rate
50MHz
Access Time
20ns
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-STQFP
Configuration
Dual
Density
144Kb
Access Time (max)
12ns
Word Size
9b
Organization
16Kx9
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
STQFP
Clock Freq (max)
50MHz
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Supply Current
55mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V261LA20TF
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT72V261LA20TF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
IDT72V261LA20TF8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
tions may begin starting with the first location in memory. Since IDT
Standard mode is selected, every word read including the first word
following Retransmit setup requires a LOW on REN to enable the rising
edge of RCLK. See Figure 11, Retransmit Timing (IDT Standard Mode),
for the relevant timing diagram.
Retransmit setup by setting OR HIGH. During this period, the internal
read pointer is set to the first location of the RAM array.
time, the contents of the first location appear on the outputs. Since
FWFT mode is selected, the first word appears on the outputs, no LOW
IDT72V261LA/72V271LA
3.3 VOLT CMOS SuperSync FIFO™ 16,384 x 9 and 32,768 x 9
When EF goes HIGH, Retransmit setup is complete and read opera-
If FWFT mode is selected, the FIFO will mark the beginning of the
When OR goes LOW, Retransmit setup is complete; at the same
11
on REN is necessary. Reading all subsequent words requires a LOW
on REN to enable the rising edge of RCLK. See Figure 12, Retransmit
Timing (FWFT Mode), for the relevant timing diagram.
HF and PAF flags begin with the rising edge of RCLK that RT is setup.
PAE is synchronized to RCLK, thus on the second rising edge of RCLK
after RT is setup, the PAE flag will be updated. HF is asynchronous,
thus the rising edge of RCLK that RT is setup will update HF. PAF is
synchronized to WCLK, thus the second rising edge of WCLK that
occurs t
PAF. RT is synchronized to RCLK.
For either IDT Standard mode or FWFT mode, updating of the PAE,
SKEW
after the rising edge of RCLK that RT is setup will update
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
JANUARY 30, 2009