IDT72V261LA15TFI IDT, Integrated Device Technology Inc, IDT72V261LA15TFI Datasheet - Page 20
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IDT72V261LA15TFI
Manufacturer Part Number
IDT72V261LA15TFI
Description
IC FIFO SS 8192X18 15NS 64QFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet
1.IDT72V271LA10PFG.pdf
(27 pages)
Specifications of IDT72V261LA15TFI
Function
Synchronous
Memory Size
144K (8K x 18)
Data Rate
67MHz
Access Time
15ns
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-STQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V261LA15TFI
NOTES:
1. Retransmit setup is complete after EF returns HIGH, only then can a read operation begin.
2. OE = LOW.
3. W
4. No more than D –2 may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, FF will be HIGH throughout the Retransmit setup procedure.
5. EF goes HIGH at 60 ns + 1 RCLK cycle + t
IDT72V261LA/72V271LA
3.3 VOLT CMOS SuperSync FIFO™ 16,384 x 9 and 32,768 x 9
D = 16,384 for IDT72V261LA and 32,768 for IDT72V271LA.
Q
1
WCLK
RCLK
0
= first word written to the FIFO after Master Reset, W
WEN
REN
PAE
PAF
- Q
HF
EF
RT
n
t
ENS
W
x
t
t
A
ENH
t
ENS
t
RTS
REF
t
.
RTS
Figure 11. Retransmit Timing (IDT Standard Mode)
2
= second word written to the FIFO after Master Reset.
t
t
t
ENH
REF
HF
t
SKEW4
1
W
x+1
2
20
t
PAF
1
t
ENS
2
t
t
t
A
REF
PAE
COMMERCIAL AND INDUSTRIAL
(5)
W
TEMPERATURE RANGES
1
(3)
JANUARY 30, 2009
t
t
A
ENH
4673 drw14
W
2
(3)