AD8137 Analog Devices, AD8137 Datasheet - Page 18

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AD8137

Manufacturer Part Number
AD8137
Description
Low Cost, Low Power 12-Bit Differential ADC Driver
Manufacturer
Analog Devices
Datasheet

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AD8137
APPLICATIONS
ANALYZING A TYPICAL APPLICATION WITH
MATCHED R
Typical Connection and Definition of Terms
Figure 63 shows a typical connection for the AD8137, using
matched external R
terminals of the AD8137, V
junctions. An external reference voltage applied to the V
terminal sets the output common-mode voltage. The two
output terminals, V
in a balanced fashion in response to an input signal.
The differential output voltage is defined as
Common-mode voltage is the average of two voltages. The
output common-mode voltage is defined as
Output Balance
Output balance is a measure of how well V
matched in amplitude and how precisely they are 180° out of
phase with each other. It is the internal common-mode feed-
back loop that forces the signal component of the output
common-mode towards zero, resulting in the near perfectly
balanced differential outputs of identical amplitude and exactly
180° out of phase. The output balance performance does not
require tightly matched external components, nor does it
require that the feedback factors of each loop be equal to each
other. Low frequency output balance is ultimately limited by
the mismatch of an on-chip voltage divider.
V
V
O,
O
,
dm
cm
V
OCM
V
V
=
=
IN
IP
V
V
OP
F
OP
R
R
AND R
G
G
+
2
V
F
OP
Figure 63. Typical Connection
/R
V
ON
ON
and V
V
V
G
AN
AP
networks. The differential input
G
+
AD8137
NETWORKS
AP
C
R
R
C
ON
F
F
F
F
and V
, move in opposite directions
AN
V
V
ON
OP
, are used as summing
R
OP
L, dm
and V
V
O, dm
ON
+
are
OCM
Rev. B | Page 18 of 24
(1)
(2)
Output balance is measured by placing a well-matched resistor
divider across the differential voltage outputs and comparing
the signal at the divider’s midpoint with the magnitude of the
differential output. By this definition, output balance is equal to
the magnitude of the change in output common-mode voltage
divided by the magnitude of the change in output differential-
mode voltage:
The differential negative feedback drives the voltages at the
summing junctions V
other.
The common-mode feedback loop drives the output common-
mode voltage, sampled at the midpoint of the two internal
common-mode tap resistors in Figure 61, to equal the voltage
set at the V
and
ESTIMATING NOISE, GAIN, AND BANDWITH WITH
MATCHED FEEDBACK NETWORKS
Estimating Output Noise Voltage and Bandwidth
The total output noise is the root-sum-squared total of several
statistically independent sources. Since the sources are statisti-
cally independent, the contributions of each must be individu-
ally included in the root-sum-square calculation. Table 7 lists
recommended resistor values and estimates of bandwidth and
output differential voltage noise for various closed-loop gains.
For most applications, 1% resistors are sufficient.
Table 7. Recommended Values of Gain-Setting Resistors,
and Voltage Gain for Various Closed-Loop Gains
Gain
1
2
5
10
V
V
V
Output
OP
ON
AN
R
1 k
1 k
1 k
1 k
G
=
=
=
(Ω)
OCM
V
V
V
OCM
Balance
OCM
AP
terminal. This ensures that
+
R
1 k
2 k
5 k
10 k
F
V
V
(Ω)
O
O
AN
=
2
2
, dm
, dm
and V
V
3 dB
Bandwidth (MHz)
72
40
12
6
V
O
O
,
,
cm
dm
AP
to be essentially equal to each
Total Output
Noise (nV/√Hz)
18.6
28.9
60.1
112.0
(3)
(4)
(5)
(6)

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