ADP198ACPZ-R7 Analog Devices, Inc., ADP198ACPZ-R7 Datasheet - Page 5

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ADP198ACPZ-R7

Manufacturer Part Number
ADP198ACPZ-R7
Description
Logic Controlled, 1 A, High-side Load Switch With Reverse Current Blocking
Manufacturer
Analog Devices, Inc.
Datasheet
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
VIN to GND Pins
VOUT to GND Pins
EN to GND Pins
Continuous Drain Current
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The
temperature limits are exceeded. Monitoring ambient temperature
does not guarantee that T
limits. In applications with high power dissipation and poor
thermal resistance, the maximum ambient temperature may
need to be derated.
In applications with moderate power dissipation and low
printed circuit board (PCB) thermal resistance, the maximum
ambient temperature can exceed the maximum limit as long
as the junction temperature is within specification limits. The
junction temperature (T
ambient temperature (T
(P
package (θ
Maximum junction temperature (T
ambient temperature (T
formula
D
T
T
), and the junction-to-ambient thermal resistance of the
A
A
T
= 25°C
= 85°C
J
= T
JA
A
).
+ (P
D
× θ
ADP198
JA
)
A
A
J
) of the device is dependent on the
), the power dissipation of the device
) and power dissipation (P
J
is within the specified temperature
can be damaged if the junction
J
) is calculated from the
Rating
−0.3 V to +7 V
−0.3 V to +7 V
−0.3 V to +7 V
±1000 mA
±1000 mA
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
D
) using the
Rev. B | Page 5 of 16
The junction-to-ambient thermal resistance (θ
is based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θ
PCB material, layout, and environmental conditions. The speci-
fied values of θ
to JESD 51-7 and JESD 51-9 for detailed information regarding
board construction. For additional information, see the
Application
Ψ
with units of °C/W. The Ψ
and calculation using a 4-layer board. The JESD51-12, Guidelines
for Reporting and Using Package Thermal Information, states that
thermal characterization parameters are not the same as thermal
resistances. Ψ
multiple thermal paths rather than a single path as in thermal
resistance, θ
from the top of the package as well as radiation from the package,
factors that make Ψ
Maximum junction temperature (T
board temperature (T
formula
Refer to JESD51-8, JESD51-9, and JESD51-12 for more detailed
information about Ψ
THERMAL RESISTANCE
θ
device soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type
4-Ball, 0.5 mm Pitch WLCSP
8-Lead, 2 mm × 2 mm LFCSP
ESD CAUTION
JA
JB
and Ψ
is the junction-to-board thermal characterization parameter
T
J
= T
JB
B
are specified for the worst-case conditions, that is, a
JB
Note, MicroCSP™ Wafer Level Chip Scale Package.
+ (P
. Therefore, Ψ
JB
JA
measures the component power flowing through
are based on a 4-layer, 4 inch × 3 inch PCB. Refer
D
× Ψ
JB
JB
more useful in real-world applications.
B
JB
.
) and power dissipation (P
)
JB
JB
of the package is based on modeling
thermal paths include convection
J
θ
260
72.1
) is calculated from the
JA
JA
may vary, depending on
θ
4
42.3
JC
JA
) of the package
D
) using the
Ψ
58.4
47.1
ADP198
JB
AN-617
Unit
°C/W
°C/W

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