IDT72V3680L15PFI IDT, Integrated Device Technology Inc, IDT72V3680L15PFI Datasheet - Page 18

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IDT72V3680L15PFI

Manufacturer Part Number
IDT72V3680L15PFI
Description
IC FIFO SS 16384X36 15NS 128TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet

Specifications of IDT72V3680L15PFI

Function
Asynchronous, Synchronous
Memory Size
576K (16K x 36)
Data Rate
67MHz
Access Time
15ns
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V3680L15PFI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT72V3680L15PFI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT72V3680L15PFI8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
if EF was HIGH before setup. During this period, the internal read pointer is
initialized to the first location of the RAM array.
may begin starting with the first location in memory. Since IDT Standard mode
is selected, every word read including the first word following Retransmit setup
requires a LOW on REN to enable the rising edge of RCLK. See Figure 11,
Retransmit Timing (IDT Standard Mode), for the relevant timing diagram.
setup by setting OR HIGH. During this period, the internal read pointer is set
to the first location of the RAM array.
contents of the first location appear on the outputs. Since FWFT mode is selected,
the first word appears on the outputs, no LOW on REN is necessary. Reading
all subsequent words requires a LOW on REN to enable the rising edge of
RCLK. See Figure 12, Retransmit Timing (FWFT Mode), for the relevant timing
diagram.
IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II
1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36
When EF goes HIGH, Retransmit setup is complete and read operations
If FWFT mode is selected, the FIFO will mark the beginning of the Retransmit
When OR goes LOW, Retransmit setup is complete; at the same time, the
TM
18
36-BIT FIFO
and PAF flags begin with the rising edge of RCLK that RT is setup. PAE is
synchronized to RCLK, thus on the second rising edge of RCLK after RT is setup,
the PAE flag will be updated. HF is asynchronous, thus the rising edge of RCLK
that RT is setup will update HF. PAF is synchronized to WCLK, thus the second
rising edge of WCLK that occurs t
is setup will update PAF. RT is synchronized to RCLK.
“normal latency” or “zero latency”. Figure 11 and Figure 12 mentioned
previously, relate to “normal latency”. Figure 13 and Figure 14 show “zero
latency” retransmit operation. Zero latency basically means that the first data
word to be retransmitted, is placed onto the output register with respect to the
RCLK pulse that initiated the retransmit.
For either IDT Standard mode or FWFT mode, updating of the PAE, HF
The Retransmit function has the option of two modes of operation, either
SKEW
COMMERCIAL AND INDUSTRIAL
after the rising edge of RCLK that RT
TEMPERATURE RANGES
OCTOBER 22, 2008

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