LM3S1538 Luminary Micro, Inc, LM3S1538 Datasheet - Page 462

• Manufacturer Part Number: LM3S1538
• Description: Lm3s1538 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Electrical Characteristics
20.2.4
20.2.5
462
a. The ADC reference voltage is 3.0 V. This reference voltage is internally generated from the 3.3 VDDA supply by a band
b. t
I
Table 20-11. I
a. Values depend on the value programmed into the TPR bit in the I
b. Because I2CSCL and I2CSDA are open-drain-type outputs, which the controller can only actively drive Low, the time
c. Specified at a nominal 50 pF load.
Figure 20-2. I
Hibernation Module
The Hibernation Module requires special system implementation considerations since it is intended
to power-down all other sections of its host device. The system power-supply distribution and
interfaces to the device must be driven to 0 V
regulator controlled by HIB.
The external voltage regulators controlled by HIB must have a settling time of 250 μs or less.
Parameter
DNL
OFF
GAIN
Parameter No.
2
C
ADC
gap circuit.
programmed for the maximum I2CSCL frequency (TPR=0x2) results in a minimum output timing as shown in the table
above. The I
period. The actual position is affected by the value programmed into the TPR; however, the numbers given in the above
values are minimum values.
I2CSCL or I2CSDA takes to reach a high level depends on external signal capacitance and pull-up resistor values.
= 1/f
I2CSDA
I1
I2
I3
I4
I5
I6
I7
I8
I9
I2CSCL
a
a
b
a
c
a
a
a
a
ADC clock
Parameter Name
Differential nonlinearity
Offset
Gain
2
Parameter
2
2
C interface is designed to scale the actual data transition time to move it to the middle of the I2CSCL Low
C Characteristics
C Timing
I1
t
t
t
SCSR
t
t
SCH
t
t
t
t
SRT
SFT
SCS
DH
HT
DS
LP
Parameter Name
Start condition hold time
Clock Low period
I2CSCL/I2CSDA rise time (V
Data hold time
I2CSCL/I2CSDA fall time (V
Clock High time
Data setup time
Start condition setup time (for repeated start condition
only)
Stop condition setup time
I2
I4
Preliminary
DC
I6
IH
IL
=2.4 V to V
=0.5 V to V
or powered down with the same external voltage
I7
2
C Master Timer Period (I2CMTPR) register; a TPR
Min
-
-
-
IL
IH
Nom
=0.5 V)
=2.4 V)
-
-
-
Max
I5
±1
±1
±1
I8
Min
36
36
24
18
36
24
2
-
-
LSB
LSB
LSB
Nom
I3
Unit
9
-
-
-
-
-
-
-
-
(see note b)
Max
10
-
-
-
-
-
-
-
July 26, 2008
system clocks
system clocks
system clocks
system clocks
system clocks
system clocks
system clocks
Unit
I9
ns
ns