LM3S1601 Luminary Micro, Inc, LM3S1601 Datasheet - Page 31

• Manufacturer Part Number: LM3S1601
• Description: Lm3s1601 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

1.4.4.2
1.4.4.3
1.4.5
1.4.5.1
July 26, 2008
SSI (see page 301)
Synchronous Serial Interface (SSI) is a four-wire bi-directional communications interface.
The LM3S1601 controller includes two SSI modules that provide the functionality for synchronous
serial communications with peripheral devices, and can be configured to use the Freescale SPI,
MICROWIRE, or TI synchronous serial interface frame formats. The size of the data frame is also
configurable, and can be set between 4 and 16 bits, inclusive.
Each SSI module performs serial-to-parallel conversion on data received from a peripheral device,
and parallel-to-serial conversion on data transmitted to a peripheral device. The TX and RX paths
are buffered with internal FIFOs, allowing up to eight 16-bit values to be stored independently.
Each SSI module can be configured as either a master or slave device. As a slave device, the SSI
module can also be configured to disable its output, which allows a master device to be coupled
with multiple slave devices.
Each SSI module also includes a programmable bit rate clock divider and prescaler to generate the
output serial clock derived from the SSI module's input clock. Bit rates are generated based on the
input clock and the maximum bit rate is determined by the connected peripheral.
I
The Inter-Integrated Circuit (I
(a serial data line SDA and a serial clock line SCL).
The I
devices, LCDs, tone generators, and so on. The I
diagnostic purposes in product development and manufacture.
The LM3S1601 controller includes two I
IC devices over an I
and read) data.
Devices on the I
both sending and receiving data as either a master or a slave, and also supports the simultaneous
operation as both a master and a slave. The four I
Slave Transmit, and Slave Receive.
A Stellaris
Both the I
a transmit or receive operation completes (or aborts due to an error). The I
interrupts when data has been sent or requested by a master.
System Peripherals
Programmable GPIOs (see page 160)
General-purpose input/output (GPIO) pins offer flexibility for a variety of connections.
The Stellaris
individual GPIO port. The GPIO module is FiRM-compliant (compliant to the ARM Foundation IP
for Real-Time Microcontrollers specification) and supports 23-60 programmable input/output pins.
The number of GPIOs available depends on the peripherals being used (see “Signal Tables” on page
387 for the signals available to each GPIO pin).
The GPIO module features programmable interrupt generation as either edge-triggered or
level-sensitive on all pins, programmable control for GPIO pad configuration, and bit masking in
2
C (see page 338)
2
C bus interfaces to external I
2
®
C master and slave can generate interrupts. The I
I
®
2
C module can operate at two speeds: Standard (100 Kbps) and Fast (400 Kbps).
GPIO module is comprised of eight physical GPIO blocks, each corresponding to an
2
C bus can be designated as either a master or a slave. Each I
2
C bus. The I
2
C) bus provides bi-directional data transfer through a two-wire design
2
2
C bus supports devices that can both transmit and receive (write
C devices such as serial memory (RAMs and ROMs), networking
Preliminary
2
C modules that provide the ability to communicate to other
2
2
C bus may also be used for system testing and
C modes are: Master Transmit, Master Receive,
2
C master generates interrupts when
LM3S1601 Microcontroller
2
C slave generates
2
C module supports
31