LM3S6918 Luminary Micro, Inc, LM3S6918 Datasheet - Page 6

• Manufacturer Part Number: LM3S6918
• Description: Lm3s6918 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
13.4
13.5
14
14.1
14.2
14.2.1 Bit Rate Generation ................................................................................................................. 342
14.2.2 FIFO Operation ....................................................................................................................... 342
14.2.3 Interrupts ................................................................................................................................ 342
14.2.4 Frame Formats ....................................................................................................................... 343
14.3
14.4
14.5
15
15.1
15.2
15.2.1 I
15.2.2 Available Speed Modes ........................................................................................................... 381
15.2.3 Interrupts ................................................................................................................................ 382
15.2.4 Loopback Operation ................................................................................................................ 382
15.2.5 Command Sequence Flow Charts ............................................................................................ 383
15.3
15.4
15.5
15.6
16
16.1
16.2
16.2.1 Internal MII Operation .............................................................................................................. 415
16.2.2 PHY Configuration/Operation ................................................................................................... 415
16.2.3 MAC Configuration/Operation .................................................................................................. 416
16.2.4 Interrupts ................................................................................................................................ 418
16.3
16.4
16.5
16.6
17
17.1
17.2
17.2.1 Internal Reference Programming .............................................................................................. 459
17.3
17.4
17.5
18
19
19.1
19.2
6
Register Map .......................................................................................................................... 306
Register Descriptions .............................................................................................................. 307
Synchronous Serial Interface (SSI) ................................................................................ 341
Block Diagram ........................................................................................................................ 341
Functional Description ............................................................................................................. 341
Initialization and Configuration ................................................................................................. 350
Register Map .......................................................................................................................... 351
Register Descriptions .............................................................................................................. 352
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 378
Functional Description ............................................................................................................. 378
Initialization and Configuration ................................................................................................. 389
Register Map .......................................................................................................................... 390
Register Descriptions (I
Register Descriptions (I2C Slave) ............................................................................................. 404
Ethernet Controller .......................................................................................................... 413
Block Diagram ........................................................................................................................ 414
Functional Description ............................................................................................................. 414
Initialization and Configuration ................................................................................................. 419
Ethernet Register Map ............................................................................................................. 420
Ethernet MAC Register Descriptions ......................................................................................... 421
MII Management Register Descriptions ..................................................................................... 438
Analog Comparators ....................................................................................................... 457
Block Diagram ........................................................................................................................ 457
Functional Description ............................................................................................................. 458
Initialization and Configuration ................................................................................................. 460
Register Map .......................................................................................................................... 460
Register Descriptions .............................................................................................................. 461
Pin Diagram ...................................................................................................................... 469
Signal Tables .................................................................................................................... 471
100-Pin LQFP Package Pin Tables ........................................................................................... 471
108-Pin BGA Package Pin Tables ............................................................................................ 483
2
C Bus Functional Overview .................................................................................................... 379
2
C Master) ........................................................................................... 391
2
C) Interface ............................................................................ 378
Preliminary
July 26, 2008