IDT72V283L7-5BCI IDT, Integrated Device Technology Inc, IDT72V283L7-5BCI Datasheet - Page 35
![no-image](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_sml.jpg)
IDT72V283L7-5BCI
Manufacturer Part Number
IDT72V283L7-5BCI
Description
IC FIFO 32768X18 7-5NS 80QFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Datasheet
1.IDT72V293L7-5PF.pdf
(45 pages)
Specifications of IDT72V283L7-5BCI
Function
Asynchronous, Synchronous
Memory Size
589K (32K x 18)
Data Rate
133MHz
Access Time
5ns
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
80-TQFP, 80-VQFP
Configuration
Dual
Density
576Kb
Access Time (max)
5ns
Word Size
9/18Bit
Organization
32Kx18/64Kx9
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Clock Freq (max)
133.3MHz
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.15V
Operating Supply Voltage (max)
3.45V
Supply Current
30@9BIT/35@18BITmA
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V283L7-5BCI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT72V283L7-5BCI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
NOTES:
1. n = PAE offset.
2. For IDT Standard Mode.
3. For FWFT Mode.
4. PAE is asserted LOW on RCLK transition and reset to HIGH on WCLK transition.
5. Select this mode by setting PFM LOW during Master Reset.
NOTES:
1. In IDT Standard mode: D = maximum FIFO depth. If x18 Input or x18 Output bus Width is selected, D = 512 for the IDT72V223, 1,024 for the IDT72V233, 2,048 for the IDT72V243,
2. In FWFT mode: D = maximum FIFO depth. If x18 Input or x18 Output bus Width is selected, D = 513 for the IDT72V223, 1,025 for the IDT72V233, 2,049 for the IDT72V243, 4,097
WCLK
WCLK
IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC II
8K x 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9
IDT72V223/233/243/253/263/273/283/293 3.3V HIGH DENSITY SUPERSYNC II
512 x 18, 1K x 9/18, 2K x 9/18, 4K x 9/18, 8K x 9/18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9
RCLK
RCLK
WEN
WEN
REN
REN
4,096 for the IDT72V253, 8,192 for the IDT72V263, 16,384 for the IDT72V273, 32,768 for the IDT72V283 and 65,536 for the IDT72V293. If both x9 Input and x9 Output bus Widths
are selected, D = 1,024 for the IDT72V223, 2,048 for the IDT72V233, 4,096 for the IDT72V243, 8,192 for the IDT72V253, 16,384 for the IDT72V263, 32,768 for the IDT72V273,
65,536 for the IDT72V283 and 131,072 for the IDT72V293.
for the IDT72V253, 8,193 for the IDT72V263, 16,385 for the IDT72V273, 32,769 for the IDT72V283 and 65,537 for the IDT72V293. If both x9 Input and x9 Output bus Widths are
selected, D = 1,025 for the IDT72V223, 2,049 for the IDT72V233, 4,097 for the IDT72V243, 8,193 for the IDT72V253, 16,385 for the IDT72V263, 32,769 for the IDT72V273, 65,537
for the IDT72V283 and 131,073 for the IDT72V293.
PAE
HF
Figure 21. Asynchronous Programmable Almost-Empty Flag Timing (IDT Standard and FWFT Modes)
[
n + 1 words in FIFO
D + 1
D/2 words in FIFO
Figure 22. Half-Full Flag Timing (IDT Standard and FWFT Modes)
n words in FIFO
2
]
words in FIFO
t
t
CLKH
CLKH
(1)
,
(2) ,
(2)
(3)
t
t
ENS
ENS
t
t
CLKL
CLKL
TM
35
NARROW BUS FIFO
t
ENH
t
t
ENH
TM
PAEA
t
HF
NARROW BUS FIFO
t
t
ENS
ENS
[
[
D + 1
n + 1 words in FIFO
n + 2 words in FIFO
D
2
2
+ 1
]
]
+ 1
words in FIFO
words in FIFO
t
PAEA
t
HF
(2) ,
(3)
(1)
,
COMMERCIAL AND INDUSTRIAL
(2)
n + 1 words in FIFO
[
TEMPERATURE RANGES
n words in FIFO
D + 1
D/2 words in FIFO
FEBRUARY 11, 2009
2
]
words in FIFO
(2) ,
4666 drw24
(1)
4666 drw25
,
(3)
(2)