MT18LD472FG-5 X Micron, MT18LD472FG-5 X Datasheet - Page 14

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MT18LD472FG-5 X

Manufacturer Part Number
MT18LD472FG-5 X
Description
16Mb EDO - OBSOLETE
Manufacturer
Micron
Datasheet
OBSOLETE
NOTES (continued)
31.
32.Measured with specified current load and 100pF.
33.With the FPM option,
2, 4 Meg x 72 Buffered DRAM DIMMs
DM33.p65 – Rev. 2/99
t
value. Care must be taken to ensure adequate
recovery time prior to reading valid up-level on
subsequent DIMM position.
first RAS# or CAS# signal to transition HIGH. In
comparison,
mined by the latter of the RAS# and CAS# signals
to transition HIGH.
PDOFF MAX is determined by the pull-up resistor
t
OFF on an EDO option is deter-
t
OFF is determined by the
14
34.Applies to both FPM and EDO operating modes.
35.If OE# is tied permanently LOW, LATE WRITE or
36. V
READ-MODIFY-WRITE operations are not
possible.
width
greater than one third of the cycle rate. V
undershoot: V
10ns, and the pulse width cannot be greater than
one third of the cycle rate.
IH
overshoot: V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
10ns, and the pulse width cannot be
BUFFERED DRAM DIMMs
IL
(MIN) = -2V for a pulse width
IH
(MAX) = V
2, 4 MEG x 72
DD
+ 2V for a pulse
©1999, Micron Technology, Inc.
IL

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